Result: crash
Detail | Value |
---|---|
Returncode | -6 |
Time | 0:00:07.712921 |
Stdout | |
Stderr |
Overran sorted position: t44: i32,ch = load<(load 2 from %ir.9, !tbaa !8, addrspace 1), zext from i16> t235, t21, undef:i32 t21: i32 = add nuw t82, Constant:i32<2> t82: i32 = CONST_ADDRESS Constant:i32<8228> t81: i32 = Constant<8228> t17: i32 = Constant<2> t1: i32 = undef Checking if this is due to cycles Detected cycle in SelectionDAG Offending node: t235: ch = store<(store 8 into %ir.storetmp, !tbaa !8, addrspace 1)> t66, t241, t234, undef:i32 t241: v2i32 = BUILD_VECTOR t324, t296 t324: i32,ch = load<(load 4 from %stack.1, align 8, addrspace 5)> t303, t323, undef:i32 t323: i32 = DWORDADDR Constant:i32<4> t14: i32 = Constant<4> t1: i32 = undef t296: i32 = or t295, t291 t295: i32 = and t304, Constant:i32<-65536> t304: i32,ch = load<(load 4 from `i32 addrspace(5)* undef`, addrspace 5)> t314, t302, undef:i32 t302: i32 = DWORDADDR Constant:i32<5> t372: i32 = Constant<5> t1: i32 = undef t374: i32 = Constant<-65536> t291: i32 = and t85, Constant:i32<65535> t85: i32,ch = load<(load 2 from %ir.6, !tbaa !13, addrspace 1), anyext from i16> t0, t15, undef:i32 t15: i32 = add nuw t82, Constant:i32<4> t82: i32 = CONST_ADDRESS Constant:i32<8228> t81: i32 = Constant<8228> t14: i32 = Constant<4> t1: i32 = undef t174: i32 = Constant<65535> t234: i32 = DWORDADDR t233 t233: i32 = srl t69, Constant:i32<2> t69: i32 = CONST_ADDRESS Constant:i32<8232> t68: i32 = Constant<8232> t17: i32 = Constant<2> t1: i32 = undef |
Environment |
PIGLIT_SOURCE_DIR="/home/vesely/piglit" PIGLIT_PLATFORM="mixed_glx_egl" |
Command | /home/vesely/piglit/bin/cl-program-tester /home/vesely/piglit/generated_tests/cl/vload/vload-ushort-global.cl |
dmesg |