07:03 airlied[d]: okay one wierd renderpass depth/stencil thing left on blackwell and I suspect it vk1.3 will be nearly done
07:42 airlied[d]: okay, kicking off the should all pass run
07:44 airlied[d]: except for dEQP-VK.api.driver_properties.conformance_version
08:04 lru: sure are a lot of magic numbers in the nouveau kernel driver :-)
08:05 lru: u32 stat = nvkm_rd32(device, 0x00b100); // where do I find docs for such a thing?
08:05 dwfreed: probably the commit adding the line
08:09 lru: btw, what does 'gr' stand for in directory names such as enging/gr/ ?
08:23 airlied: it's reverse engineered, so not a lot of docs, gr is graphics
08:24 lru: airlied: thanks.... are there rough notes kept somewhere?
08:24 lru: or do developers read the code fresh each time to understand the hardware?
08:26 airlied: lru: https://envytools.readthedocs.io/en/latest/ but it's not also easy to get what the hardware is doing
08:26 airlied: lru: on newer hw, the firmware hides a lot more stuff so it's easier
08:27 lru: I'm trying to debug old stuff... gt218 (which I think matches nv50 and gr84 code)
08:27 airlied: and since that 0xb100 is in the mpeg code, probably isn't at all documented
08:27 lru: thanks for the link!
08:29 lru: oh, this site is beautiful
09:03 lru: are there any details on the PGRAPH MMIO area? 0x400000
09:03 lru: most of those sections are empty,except for NV3
09:04 lru: I'm specifically trying to understand nvkm/engine/gr/g84.c's g84_gr_tlb_flush
09:05 lru: https://envytools.readthedocs.io/en/latest/hw/memory/g80-vm.html#tlb-flushes explains the end of the function, but there is a timeout loop at the top which fiddles with 0x400000
09:06 lru: that URL also explains a potential bug in the hardware that causes a lockup
09:06 lru: this is very close to what I'm seeing (video freezes, audio freezes, rest of system seems to keep going)
09:43 vertasium88: I am at the tops of my brain power, hexadecimal/ipv6 as well as some other stuff, took my only 25minutes to read out. so 37 41 and 57 were all part of the ideal distribution where i developed two of those distributions, one has operands of add/sub encoded differently, things got ready to fire up a file system specification, i am scanning through unicode/ASCI/utf8-16 but in general every
09:43 vertasium88: system of such starts with laying down the index , differentiating it for balancing twice to cause 4digit gaps, then stashing into a packed sequence hash, and the sample has all 32to64 powers on the index of 118, it is accessed by the triple-triple logic where incoming data is 118-37=81 for power that is represented with 37 it pins the first triplet for 37 as by the incoming value of 81 as
09:43 vertasium88: bottom operator 118+118+118+37+37+37-192-3*118=-81 and top operator 118+118+118+37+118+118-192-3*118=81 and swollowing buddy as 118+118+118+37+37+37-192-3*118, it packs the powers not in two eliminate them by 118+118+118+118+57+57-232-3*118 and bottom one 118+118+118+57+57+57-232-3*118, so the primary operation is add in that case chosen over subtract on signed integer only (might be more
09:43 vertasium88: supported) and incoming data is 37+57 in short pseudo format for demonstration, so 57 would be not in and 37 is in pinned in the hash, as unlike AI i can replace a value anywhere on the hash by remoing the value which was at the given index and adding whatever back as replcament , you can always stuff to the head of that hash contiguously until it gets full. so the procedure looks like
09:43 vertasium88: selecting the bank and index and chopping off the remainder after swollowing bank, and adding 118 to swallowing bank to yield a value of 37 stored in hash at index 118. And it all already functions. but in real format we have more powers. however the logic is correct, it was demonstrated for shorter talks. So -192 came as 112-80+112 and it is normally not known so it's preremoved by the
09:43 vertasium88: compiler, since on replacong a value you access for example 37, then 192 is gotten to remove with as 118(index)-37-37=74+118=192 , so i am already coding the modern systems.
09:45 vertasium88: It's that i even have time but it's cumbersome to deal with people like you which hampers all my interest to deal with computers and enjoying the proccess, cause there is nothing to be enjoyed in dealing with you.
09:52 airlied[d]: dEQP-VK.api.driver_properties.conformance_version,Fail
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_binding_buffer.multiple.compute_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_binding_buffer.multiple.graphics_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_binding_buffer.multiple.graphics_frag_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_binding_buffer.multiple.graphics_vert_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_residency_buffer.multiple.compute_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_residency_buffer.multiple.graphics_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_residency_buffer.multiple.graphics_frag_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.sparse_residency_buffer.multiple.graphics_vert_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.traditional_buffer.multiple.compute_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.traditional_buffer.multiple.graphics_comp_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.traditional_buffer.multiple.graphics_frag_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.binding_model.descriptor_buffer.traditional_buffer.multiple.graphics_vert_buffers32_sets1,Timeout
09:52 airlied[d]: dEQP-VK.fragment_shading_rate.renderpass2.monolithic.attachment_rate.misc.two_subpass,Fail
09:52 airlied[d]: dEQP-VK.info.device_extensions,Fail
09:52 airlied[d]: dEQP-VK.memory.pipeline_barrier.transfer_src_transfer_dst.1048576,Timeout
09:52 airlied[d]: I think only the shading rate one is a real problem
09:53 asdqueerfromeu[d]: airlied[d]: I wonder why device_extensions test is failing in particular
09:54 lru: if I see code like this, what units should I assume the timer is in? microseconds? !(timeout = nvkm_timer_read(tmr) - start > 2000000000)
10:04 airlied[d]: nanoseconds probably
10:05 lru: thanks
10:11 airlied[d]: asdqueerfromeu[d]: Mismatch between old CTS and new extensions
15:59 karolherbst[d]: Is there any reason why the `// Update phi_webs with the registers assigned in this block` block in `assign_regs.rs` is done that late? I wonder if it's fine to just do something like that after each assignment of values related to phis
16:00 karolherbst[d]: which would allow assignments in the same block to get properly identified as belonging to phi vectors
16:00 karolherbst[d]: if so, I think I can simplify most of the code I've written on that
16:39 mhenning[d]: karolherbst[d]: I think I did that just because it was easiest to write it that way at the time
16:40 karolherbst[d]: makes sense
16:40 mhenning[d]: (and the heuristic in main doesn't actually benefit from adding that information any earlier)
16:40 karolherbst[d]: yeah it's fair
16:40 karolherbst[d]: I just want to add my phi vector collection code to PhiWebs and that's the biggest blocker for doing so
16:41 mhenning[d]: yep! I think that should work
16:55 karolherbst[d]: nice, that worked!
16:56 karolherbst[d]: instead of allocating all the phi vecs (which uhm.. violates tree-scan and I'm sure is broken for more complex phi chains) the PhiWeb kicks in instead and allocates the 2nd component of a vec at 11 instead of 9 (the 1st component got a 10)
16:56 karolherbst[d]: okay.. only need to clean up the code and then should be ready to submit it
16:57 karolherbst[d]: current plan is to call try_find_unused_reg_range on the entire vec, do the phi_web.set for the entire vector, and then just assign_reg the component, and hope that everything else goes through the phiwebs then
16:58 karolherbst[d]: *for
16:59 karolherbst[d]: I have a "SSAUse::Phi" for this to mark scalars being part of vectored phis
17:00 mhenning[d]: sounds plausible
17:26 gfxstrand[d]: I'm seeing fails on this CTS branch I haven't seen before. Has anyone else seen dEQP-VK.image.image_size.2d_array.readonly_6x6x16384 and similar?
18:01 mohamexiety[d]: ./deqp-vk --deqp-case=dEQP-VK.image.image_size.2d_array.readonly_6x6x16384
18:01 mohamexiety[d]: Writing test log into TestResults.qpa
18:01 mohamexiety[d]: dEQP Core unknown (0xcafebabe) starting..
18:01 mohamexiety[d]: target implementation = 'Default'
18:01 mohamexiety[d]: DONE!
18:02 mohamexiety[d]: Test run totals:
18:02 mohamexiety[d]: Passed: 0/0 (0.0%)
18:02 mohamexiety[d]: Failed: 0/0 (0.0%)
18:02 mohamexiety[d]: Not supported: 0/0 (0.0%)
18:02 mohamexiety[d]: Warnings: 0/0 (0.0%)
18:02 mohamexiety[d]: Waived: 0/0 (0.0%)
18:02 mohamexiety[d]: looks like new tests
18:02 mohamexiety[d]: (this is 1.4.3.0)
21:40 mangodev[d]: orowith2os[d]: maybe this page could be updated? at least one of these are checked off for the most part
22:04 mangodev[d]: i'm also curious to see how https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34485 performs in the modern codebase, given there's more optimizations and tools for it to work with
22:33 gfxstrand[d]: mangodev[d]: Don't worry. I haven't forgotten about it
23:24 mhenning[d]: speaking of bounds checks does anyone know what the `LDG P, R, desc[UR][R]` does on ada?
23:25 mhenning[d]: I'd guess that they're hardware ssbos but I don't see any way to bind the descriptors in the compute/3d headers
23:26 mhenning[d]: maybe they work like bindless cbufs and the UR has a base address and length? idk
23:28 karolherbst[d]: uhm...
23:28 karolherbst[d]: it's a bit weird
23:30 karolherbst[d]: mhenning[d]: tldr: it's for cache stuff
23:30 mhenning[d]: huh?
23:31 karolherbst[d]: yeah, the descriptor specifies caching behavior
23:31 mhenning[d]: wild
23:31 mhenning[d]: is "the descriptor" here the contents of the ureg?
23:32 karolherbst[d]: unclear to me tbh
23:32 mhenning[d]: alright, that's weird.
23:32 karolherbst[d]: yeah...
23:32 mhenning[d]: I guess I won't worry about it too much then
23:32 karolherbst[d]: it doesn't impact address calculation in any way
23:33 karolherbst[d]: let me check if there is something in ptx which might actually need this...
23:35 karolherbst[d]: don't see anything...
23:38 karolherbst[d]: mhenning[d]: https://forums.developer.nvidia.com/t/what-does-desc-mean-in-sass/258352
23:39 karolherbst[d]: anyway.. I don't really know more about those and they don't feel necessarily important for vulkan
23:40 karolherbst[d]: just know that they can override the caching flag
23:40 karolherbst[d]: the policy one
23:41 mhenning[d]: oh, yeah if it's copy acceleration stuff that makes some sense
23:41 mhenning[d]: probably not something we need to worry about for now