00:17 airlied[d]: I thought orin was tegra display
01:50 nonecaresatall: Jeffrey Sachs's speech got the late hours of mine. I agree with everything he said. So to comment on your possible abuse or little milder cyberabuse if not both. I am a true believer that people can change in time, since many have managed to pull that even off. And this certainly is a hope of mine at this IRC environment, where i definitely had long time decided that i do not charge you
01:50 nonecaresatall: or accuse you for what you have done, because it's generally mild cyberstuff only so far. However since i used your software i thought about it for longer period if i share my results and decided to do that with hopes to future that you can change your attitude and false belives as constantly going over the line into a plusible total absurd annoyance. So that applies to most abuse europe
01:50 nonecaresatall: residents such as estonians that what most of them get is a mild shock imprisonment, and repetitive entries if the fraud continues, since tyrans die anyways. None of those noisiest terrorist could be ever considered as first line defense either when the provoked war would start with Russians. The wank spam would not cut in as enough of heroics there. They'd recruite people with skills to
01:50 nonecaresatall: do that anyways. But i have faced most people considered as aggressors, rather defending my human rights from bastards. And that in general applies to so many Russians, that the count is lost. IT'd be the sourest battlefield to go into onto a battlefield against them, but that might happen, instead i would follow even better logics, that monsters get handled locally or and globally and
01:50 nonecaresatall: try to get into peace with pretty solid and smart neighbours in general. The best technology i have and some military plans too despite of that. So sure i will prepare the best i can for the possible invasion. But back to the technology my goal was to release code that does not have to rely on interrupts like sign based zero delay ones, though they can be used, some chips like r300 does
01:50 nonecaresatall: not offer it, and hence support all hardware ever manufactured in the world, and that is where i substantially respect all of your efforts too so far, which hasn't gone that bad all , if not ideal. But overall my work is done in public now. If i get to powers the biggest tyrans are behind the curtains from day one and those are the ones who faught for me to get injured and killed because
01:51 nonecaresatall: of only that they needed and wnated it due to envy, and similar cases to other victims possibly elsewhere. But i continue doing the code to finish my work off on the last year, where i sometimes perhaps few times till come here, cause i have quite recent iphone functional you would reach me at mart.martin1983@gmail.com, the phone drops a notification onto my screeen immediately. So that
01:51 nonecaresatall: is about it, never understimate anyone is a recap for myself, and lot of efforts like code property graphs on wasm, really surprised me, that Portugese can do wonders just the same as i, but it needs little effort to polish the compiler out based of that skeleton so i will be coding and i know i succeed because i am overqualified and know all and everything about tech and computers.
03:50 pavlo_kozlenko[d]: I didn't understand anything.
03:55 tiredchiku[d]: avg irc spam
10:09 magic_rb[d]: Luckily IRC doesnt do embeds *looks at matrix*
10:10 x512[m]: Matrix user here.
10:12 magic_rb[d]: Same, im also through matrix but through discord
10:12 magic_rb[d]: Ill be the first admin. Matrix has a really really bad spam problem
10:14 magic_rb[d]: \*to admit
10:17 x512[m]: Matrix supports adding users to ignore list.
10:19 magic_rb[d]: That doesnt help when certain home servers have lax registrations policies and spammers create 50 user accounts, slowly join them to rooms and then spam NSFL/NSFW material
10:19 magic_rb[d]: And also just plain out illegal imagery
10:20 x512[m]: Ideally it should be moderators in each bridge.
10:20 magic_rb[d]: No i mean you have a native matrix room, which can be joined by anyone
10:21 x512[m]: This Matrix room admin is displayed as "@oftc-irc:matrix.org".
10:21 magic_rb[d]: Even if the moderators delete the spam, the way most homeservers and clients work, means that media will stay cached, so you need to manually clear all caches... personally ive disabled all remote media
10:21 magic_rb[d]: The admin deleting things is only a small part of the puzzle
10:39 karolherbst[d]: x512[m]: the thing is, that the matrix <-> oftc bridge was force upon everybody
10:39 karolherbst[d]: *forced
10:39 karolherbst[d]: it created problem people might not want to deal with in the first place
10:41 karolherbst[d]: it's like that the ones polluting everything with AI spam saying "well. can just use bots to clean it up, I don't see how that's my fault you are annoyed by it 🤷"
13:13 somethoughts: SSD starts to blow up on my computer but i have several backup SSDs i assume. Time is flying i am already 42 in a week from now, though I started to see clearly how things have to be handled there is a lot of effort from my side yet needed. And i am not interested in your forced fecalism and that is period. I was never interested on those estonian outsiders and gang stalker crocodile
13:13 somethoughts: quasimodos either and none of their porn or wank insights.
14:15 gfxstrand[d]: Ugh... Why is kepler so borked?
14:17 gfxstrand[d]: Okay, so it looks like it's expecting compression metadata before the image.
14:20 gfxstrand[d]: nvc0 chooses `compressed` based on drm version
14:29 gfxstrand[d]: Why is `0x150000` being added to my address?
14:36 gfxstrand[d]: I don't see this in the nvc0 code
14:37 snowycoder[d]: gfxstrand[d]: How did you read it?
14:38 gfxstrand[d]: What do you mean?
15:00 gfxstrand[d]: gfxstrand[d]: I suspect the HW is expecting some compression metadata to go there but IDK what's going on.
15:00 snowycoder[d]: gfxstrand[d]: You can trad the address that the tex instruction accesses directly?
15:01 gfxstrand[d]: Image layout R/E tests: https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/112
15:33 gfxstrand[d]: It's like everything starts at array slice 1
15:34 gfxstrand[d]: Oh, wait... I think it is accessing array slice 1
15:37 calico: the nouveau driver doesn't support "ray tracing" or it's just the GTX 1660 Ti Mobile that doesn't support it?
15:38 calico: tried to launch Quake 2 RTX
15:39 gfxstrand[d]: NVK doesn't do ray tracing yet
15:43 orowith2os[d]: The 1660Ti also doesn't have hardware capabilities for ray tracing. You'll end up using software rt
15:45 pavlo_kozlenko[d]: calico: **gtx**
15:54 gfxstrand[d]: orowith2os[d]: That we know of. The 1650 and 1660 have most of the same hardware as other chips but it's pretty badly nerfed. But also, we don't understand the RT hardware well enough to be sure.
15:58 mhenning[d]: gfxstrand[d]: well, if the prop driver doesn't have hardware rt on those gens, I think a reasonable assumption is there isn't hardware rt
15:59 gfxstrand[d]: They also don't advertise cooperative matrix but the HW is there. <a:shrug_anim:1096500513106841673>
15:59 gfxstrand[d]: I think it's safe to say that there's *something* wrong but the hardware being missing might not be it.
15:59 orowith2os[d]: Well, it *is* Turing, so if someone gets around to rt on NVK, they might be able to figure it out
16:01 gfxstrand[d]: Yeah. But RT is a ways out yet, most likely
16:25 calico: pavlo_kozlenko orowith2os: https://www.reddit.com/r/pcmasterrace/comments/12yaixa/ray_tracing_on_a_gtx1660ti/
16:25 calico: see on that pic, Technologies --> Ray Tracing is checked
16:25 gfxstrand[d]: Yes. They do an emulated things on 1660, 1650 and maybe 10xx cards
16:25 tiredchiku[d]: it can do software rt, yeah
16:26 calico: k
16:26 calico: so even that wouldn't work in Nouveau?
16:26 calico: gotcha
16:26 calico: anyway I don't care
16:27 x512[m]: It seems that Nvidia Vulkan use memory object as Vulkan opaque FD data, not semsurf.
16:28 x512[m]: I wonder how OpenGL-Vulkan interop works gracefully with opaque FDs and without dmabuf modifiers stuff.
16:29 tiredchiku[d]: calico: it would, someone has to implement it in the driver
16:29 calico: orowith20os[d]: "Well, it *is* Turing," --> which would mean it would be like for Vulkan on Fermi? Could work but not implemented in the proprietary drivers
16:29 x512[m]: Ideally NVK NVRM KMD and Nvidia proprietary OpenGL/Vulkan/CUDA FD interop should work.
16:30 gfxstrand[d]: snowycoder[d]: Found it!
16:30 gfxstrand[d]: It's really dumb...
16:31 snowycoder[d]: gfxstrand[d]: 0_0
16:31 snowycoder[d]: What was it?
16:32 gfxstrand[d]: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34495
16:32 gfxstrand[d]: Second patch
16:33 marysaka[d]: that would do it :blobcatnotlikethis:
16:34 orowith2os[d]: calico: by "it *is* Turing", I mean, other Turing (RTX) GPUs have the capabilities, and Faith mentioned hardware being there for some stuff, but it not being utilized - so hardware RT is very much a possibility, but it might not work whether it be for some shipped versions of it being broken, or too slow, or NVIDIA just not wanting to implement it to get people to buy their RTX GPUs.
16:34 gfxstrand[d]: Daniel was really careful to test everything matched on the Maxwell+ headers but couldn't test Kepler
16:34 gfxstrand[d]: So a bug snuck in when we did the Rust rewrite
16:35 snowycoder[d]: I knew it was something in TICs!
16:35 snowycoder[d]: Thank you so much :3
16:35 snowycoder[d]: Now I can finish other encodings an images.
16:36 gfxstrand[d]: I'm still gonna play with textures
16:36 gfxstrand[d]: snowycoder[d]: Yup. And it was almost impossible to find, too. `*` and `+` look so similar that you really have to look for it or your brain autocorrects to "nah, that's probably not it"
16:37 snowycoder[d]: P.s. I didn't have much time to work on kepler this week, but suclamp is really weird and I have still no idea where the input data that it receives originates from.
16:37 snowycoder[d]: There's a prototype Foldable impl on the last MR
16:37 snowycoder[d]: gfxstrand[d]: Please do, thanks!
17:01 gfxstrand[d]: Hrm... offset+depth compare isn't working
17:34 gfxstrand[d]: Test run totals:
17:34 gfxstrand[d]: Passed: 2487/3706 (67.1%)
17:34 gfxstrand[d]: Failed: 0/3706 (0.0%)
17:34 gfxstrand[d]: Not supported: 1219/3706 (32.9%)
17:34 gfxstrand[d]: Warnings: 0/3706 (0.0%)
17:34 gfxstrand[d]: Waived: 0/3706 (0.0%)
17:34 gfxstrand[d]: That's `dEQP-VK.glsl.texture_functions.*`
17:37 snowycoder[d]: I found that suclamp/sumad/... get as input `nvc0_set_surface_info`, that indexes into a value table `nve4_su_format_aux_map` with values documented as "unk8" and "unk22" :/
17:37 snowycoder[d]: The mistery deepens
18:00 gfxstrand[d]: oof
18:00 gfxstrand[d]: Test run totals:
18:00 gfxstrand[d]: Passed: 898/2060 (43.6%)
18:00 gfxstrand[d]: Failed: 0/2060 (0.0%)
18:00 gfxstrand[d]: Not supported: 1162/2060 (56.4%)
18:00 gfxstrand[d]: Warnings: 0/2060 (0.0%)
18:00 gfxstrand[d]: Waived: 0/2060 (0.0%)
18:00 gfxstrand[d]: That's `dEQP-VK.glsl.texture_gather.*`
18:02 gfxstrand[d]: It's all in my nak/kepler-tex branch. Feel free to pull patches and re-arrange however makes sense.
18:02 gfxstrand[d]: "nak: Lower texture inputs for Kepler B" is probably already good as a patch.
18:13 gfxstrand[d]: We still need a good strategy for the texdep stuff
18:18 mhenning[d]: gfxstrand[d]: I think it's just a dataflow analysis.
18:24 gfxstrand[d]: It's basically the same thing we do for the other deps. We just need to extend it.
18:26 mhenning[d]: No, it's not. We're not allocating indices for them, we're just counting how far away they are
18:27 mhenning[d]: You can track, for each reg, if the reg was assigned to by a tex instruction, and if so how many texs ago it was
18:27 mhenning[d]: each tex instruction sets its reg to "0 ago" and increments the counters for everything else
18:28 mhenning[d]: join function for dataflow is minimum per-reg
18:39 gfxstrand[d]: Yeah. It's simpler