02:04 fdobridge: <c​langcat> I mean you could try again this year.
02:49 fdobridge: <k​arolherbst🐧🦀> yeah.. I guess so
13:15 fdobridge: <k​onstantinseurer> This triangle was brought to you by NVK's first TLAS:
13:15 fdobridge: <k​onstantinseurer> https://cdn.discordapp.com/attachments/1034184951790305330/1172524927224664095/result.ppm?ex=6560a1ef&is=654e2cef&hm=8e618af447d749217961be02e2eff0360ae116aac3f280c499ecab6628a17f10&
13:15 fdobridge: <k​onstantinseurer> cmon discord
13:16 fdobridge: <!​[NVK Whacker] Echo (she) 🇱🇹> No .ppm support
13:16 fdobridge: <!​[NVK Whacker] Echo (she) 🇱🇹> https://cdn.discordapp.com/attachments/1034184951790305330/1172525302451277884/Screenshot_20231110_151632.png?ex=6560a248&is=654e2d48&hm=517df32d331f764d650ee777552455916cfa2e8cf6ef9149badd04b6ec6bf7d8&
13:17 fdobridge: <k​onstantinseurer> amazing
13:18 fdobridge: <!​[NVK Whacker] Echo (she) 🇱🇹> What does TLAS mean?
13:19 fdobridge: <k​onstantinseurer> Top level acceleration structure (ray tracing)
13:21 fdobridge: <r​hed0x> :oooo
13:21 fdobridge: <r​hed0x> i need more details 🐸
13:22 fdobridge: <r​hed0x> are you running the RADV software RT code with NVK rn?
13:23 fdobridge: <k​onstantinseurer> Nope, this is hardware RT by the prop driver with a TLAS built by NVK injected
13:23 fdobridge: <p​ac85> Oh wow did you re the format?
13:23 fdobridge: <r​hed0x> and how did you inject it?
13:24 fdobridge: <r​hed0x> i guess you could alias a TLAS with a buffer and just write the buffer
13:24 fdobridge: <r​hed0x> i guess you could alias a TLAS with a buffer and just write the buffer? (edited)
13:24 fdobridge: <k​onstantinseurer> Mapping the memory backing the acceleration structure
13:24 fdobridge: <r​hed0x> didnt know you were allowed to put acceleration structures in host visible memory
13:25 fdobridge: <p​ac85> So how is the nv bvh structured?
13:25 fdobridge: <k​onstantinseurer> It works 🤷‍♂️
13:27 fdobridge: <k​onstantinseurer> Internal nodes can have up to 12 children, their bounds are encoded using a 8-bit grid and there is some information about child offsets, the grid, ...
13:27 fdobridge: <k​onstantinseurer> Triangle nodes can contain up to 5(?) triangles which are compressed by sharing bits with v0
13:28 fdobridge: <p​ac85> Oh wow
13:28 fdobridge: <k​onstantinseurer> https://gitlab.freedesktop.org/KonstantinSeurer/bvhre/-/blob/main/source/nvk/nvk_bvh.h?ref_type=heads
13:28 fdobridge: <p​ac85> Thanks!
13:28 fdobridge: <p​ac85> Very interesting
13:29 fdobridge: <k​onstantinseurer> Ignore nvk_bvh_header, it's just data specific to the prop driver which can be cleared for the most part
13:30 fdobridge: <p​ac85> What does the 8bit grid store?
13:31 fdobridge: <p​ac85> This is way more sophisticated than amd lol
13:31 fdobridge: <k​onstantinseurer> Child node AABBs
13:31 fdobridge: <k​onstantinseurer> yes
13:31 fdobridge: <r​hed0x> not entirely surprising, is it? 🐸
13:31 fdobridge: <p​ac85> I mean it doesn't take much to be more sophisticated than amd ol
13:40 fdobridge: <m​arysaka> I got on a rabbit hole on envyhooks again.. turns out the dumper was not working on gen before Volta...
13:41 fdobridge: <m​arysaka> @konstantinseurer did you needed to parse any MME macros for your researches?
13:41 fdobridge: <m​ohamexiety> oooh wow this is amazing
13:42 fdobridge: <m​arysaka> I think the dumper on that side is a bit wrong 😅
13:46 fdobridge: <m​ohamexiety> I had wanted to work on RT when we got to it so this is exciting
13:47 fdobridge: <k​onstantinseurer> Not yet, but I will try to make sure that I won‘t miss any magic hardware features
13:48 fdobridge: <m​arysaka> I had a feeling that RT was calling a lot of macros when I looked that a bit during XDC
13:49 fdobridge: <p​ac85> I wonder what kind of traces you get from the proprietary driver
13:49 fdobridge: <p​ac85> Is it like cmdbuf+the macros?
13:51 fdobridge: <m​arysaka> if you talk about envyhooks, we dump cmdbuf + extract the macro upload from the cmdbuf
13:52 fdobridge: <p​ac85> Uhm I swe
13:53 fdobridge: <m​arysaka> because the FIFO is mapped in userland I catch kickoff in a segfault handler, dump and resume execution
13:53 fdobridge: <p​ac85> Uhm lol
13:53 fdobridge: <m​arysaka> it's a mess but it works ™️
13:54 fdobridge: <p​ac85> They have a fifo allocated per process I presume
13:54 fdobridge: <p​ac85> Which the firmware schedules on some real underlying fifo?
13:54 fdobridge: <m​arysaka> fifo per channels*
13:55 fdobridge: <m​arysaka> not sure how a channel is allocated on the hardware side tbh
13:56 fdobridge: <p​ac85> Mmm
13:57 fdobridge: <m​arysaka> It's also quite a mess because on Volta+ the actual GPFIFO channel is mapped at a non page aligned offset :vReiAgony:
13:57 fdobridge: <p​ac85> So anyway I guess the next step would be figuring out the shader side of rt
13:57 fdobridge: <m​arysaka> (For before it's just in its own mapping clean and nice)
13:58 fdobridge: <p​ac85> Yeah you talked to me about that at xdc lol
13:58 fdobridge: <p​ac85> Have you looked at a shader that does day queries?
13:59 fdobridge: <m​arysaka> not really, when I saw the amount of macros, I just switch back to mesh shader
13:59 fdobridge: <p​ac85> Lol fair enough
14:00 fdobridge: <p​ac85> But that might have been rt pipeline or bvh building related maybe?
14:22 fdobridge: <m​arysaka> not really, when I saw the amount of macros, I just switched back to mesh shader (edited)
14:42 fdobridge: <m​arysaka> Okay fixed Maxwell / Pascal support for envyhooks
14:42 fdobridge: <m​arysaka> and hopefully macro dumping
14:44 fdobridge: <m​arysaka> On another subject, the new VM_BIND ioctls don't work on tegra, the fence get signaled too early
14:44 fdobridge: <b​ylaws> Xavier?
14:44 fdobridge: <m​arysaka> T210
14:45 fdobridge: <m​arysaka> There is nothing at the moment that handle syncpoints so I'm pretty sure it's related
14:45 fdobridge: <m​arysaka> I also do believe that this doesn't show on the old GEM way by luck
14:47 fdobridge: <b​ylaws> Ah I see
15:54 fdobridge: <g​fxstrand> Okay, time to figure out Maxwell input interpolation. 🙃
16:23 fdobridge: <D​j-Death> How much reverse do you have to do?
16:29 fdobridge: <g​fxstrand> Not much
16:29 fdobridge: <g​fxstrand> Just copy+paste mostly
16:29 fdobridge: <g​fxstrand> At least for the first pass
16:29 fdobridge: <g​fxstrand> Passing all the CTS tests might require more
17:28 fdobridge: <k​arolherbst🐧🦀> we should update our evoc project ideas 😄
17:28 fdobridge: <k​arolherbst🐧🦀> somebody wants to work on codegen
17:36 fdobridge: <!​[NVK Whacker] Echo (she) 🇱🇹> Feel free to roast this: https://aur.archlinux.org/packages/lib32-vulkan-nouveau-git
19:24 fdobridge: <a​irlied> Might be worth returning ENOSYS for those ioctls on Tegra until someone cares
19:27 fdobridge: <g​fxstrand> ```
19:27 fdobridge: <g​fxstrand> ./deqp-vk -n dEQP-VK.pipeline.monolithic.sampler.*
19:27 fdobridge: <g​fxstrand> ...
19:27 fdobridge: <g​fxstrand> Test run totals:
19:27 fdobridge: <g​fxstrand> Passed: 39454/91280 (43.2%)
19:27 fdobridge: <g​fxstrand> Failed: 0/91280 (0.0%)
19:27 fdobridge: <g​fxstrand> Not supported: 51826/91280 (56.8%)
19:28 fdobridge: <g​fxstrand> Warnings: 0/91280 (0.0%)
19:28 fdobridge: <g​fxstrand> Waived: 0/91280 (0.0%)
19:28 fdobridge: <g​fxstrand> ```
19:29 fdobridge: <m​arysaka> Well I kind of do care 😅
19:30 fdobridge: <m​arysaka> I think stuffs should be changed to interact with host1x apis from tegra driver
19:31 fdobridge: <m​arysaka> not quite sure how that would be done but well
19:31 fdobridge: <m​arysaka> I'm quite certain than even GL is broken atm
19:51 fdobridge: <g​fxstrand> And... now we fix all the Ampere regressions in the nv50 branch. Woo
19:51 fdobridge: <a​irlied> Probably should ask the Tegra maintainer for more info, no idea if the syncpts stuff interacts with 3d stuff
19:53 fdobridge: <m​arysaka> From my digging nvgpu does all sync with syncpoints
20:16 fdobridge: <g​fxstrand> Lots of noise from LOP2 and my FS input reworks but I think it's pretty good now. I'll wait for this run to finish and then triage.
20:46 fdobridge: <g​fxstrand> @airlied FWIW, my 3060 seems pretty stable so far. Do you want me to try my other 2060 as a datapoint?
21:10 fdobridge: <a​irlied> Would be useful alright to see if all Turing or just that one
21:13 fdobridge: <g​fxstrand> Okay. My ampere run has another 30 min to go and then I'll pull my other Turing out of my blob box
21:31 fdobridge: <a​irlied> Does ampere need some work to get conformance?
21:33 fdobridge: <g​fxstrand> It's looking pretty good with this run. About like Turing.
21:33 fdobridge: <g​fxstrand> Multi-threaded runs are never quite clean but it seems in reasonably good shape.
21:33 fdobridge: <g​fxstrand> Once NAK lands next week, I'll try to merge in a few more things and do an Ampere submission.
21:48 fdobridge: <g​fxstrand> `Pass: 411770, Fail: 13, Crash: 9, Warn: 4, Skip: 3577070, Flake: 2, Duration: 1:02:26`
21:48 fdobridge: <a​irlied> Is that a nak run?
21:48 fdobridge: <g​fxstrand> Of course! Codegen fails like 250 tests. 😂
21:49 fdobridge: <g​fxstrand> And that's with `NV50_OPTIMIZE=1` so it doesn't break geometry shaders
21:50 fdobridge: <g​fxstrand> I'm gonna throw 36 threads at it just to see what happens. 😅
21:51 fdobridge: <g​fxstrand> Uh oh... It didn't like that.
21:58 fdobridge: <g​fxstrand> Yeah, I think this GPU just doesn't like having 36 live contexts
21:58 fdobridge: <g​fxstrand> That or it's OOMing
21:58 fdobridge: <g​fxstrand> The good news is that the kernel and firmware seem to be surviving
21:59 fdobridge: <g​fxstrand> Just not my tests. 😂
22:02 fdobridge: <g​fxstrand> Oops! There goes my kernel. 😂
22:03 fdobridge: <g​fxstrand> Looks like someone isn't checking an errptr
22:03 fdobridge: <c​langcat> Kernel panic?
22:04 fdobridge: <g​fxstrand> ```
22:04 fdobridge: <g​fxstrand> [ 469.962211] BUG: kernel NULL pointer dereference, address: 0000000000000014
22:04 fdobridge: <g​fxstrand> [ 469.962221] #PF: supervisor read access in kernel mode
22:04 fdobridge: <g​fxstrand> [ 469.962226] #PF: error_code(0x0000) - not-present page
22:04 fdobridge: <g​fxstrand> ```
22:05 fdobridge: <c​langcat> Yea C is great. Just people find checking pointers hard.
22:06 fdobridge: <a​irlied> Maybe file an issue with the backtrace
22:07 fdobridge: <g​fxstrand> @airlied where?
22:08 fdobridge: <a​irlied> https://gitlab.freedesktop.org/drm/nouveau/-/issues/
22:16 fdobridge: <g​fxstrand> Filed
22:17 fdobridge: <g​fxstrand> https://gitlab.freedesktop.org/drm/nouveau/-/issues/274https://gitlab.freedesktop.org/drm/nouveau/-/issues/274
22:38 fdobridge: <a​irlied> dakr: ^
23:50 fdobridge: <g​fxstrand> Yeah, so... plugged in my Founder's Edition 2060 and... GSP doesn't even come up on it.
23:50 fdobridge: <g​fxstrand> Piles of warnings in dmesg