02:47 fdobridge: <g​fxstrand> Pushed nak/tess. Not quite ready to merge all that into nak/main yet but hopefully tomorrow.
15:15 fdobridge: <g​fxstrand> Is it documented what stages indirect ALD/AST work in?
15:16 fdobridge: <g​fxstrand> And what units does it use? 🤔
15:43 fdobridge: <g​fxstrand> The disassembler says indirect AST doesn't exist
15:43 fdobridge: <g​fxstrand> woo
15:47 fdobridge: <g​fxstrand> Unless there's a flag for it
15:48 fdobridge: <g​fxstrand> Okay, you can indirect patch but not per-vertex
15:48 fdobridge: <g​fxstrand> That's awesome.... 🙄
15:51 fdobridge: <m​henning> I've seen nvdisasm reject an opcode unless I set very specific bits outside of what we have marked as the opcode field.
15:51 fdobridge: <g​fxstrand> That's possible, too
15:51 fdobridge: <g​fxstrand> From my fiddling, though, that bit appears to be the patch bit
15:51 fdobridge: <m​henning> which I only discovered because cuda generated the instruction but I couldn't figure out how to use the opcode at first
15:51 fdobridge: <g​fxstrand> Which, annoyingly, makes some sense.
15:54 fdobridge: <g​fxstrand> There's a .phys bit
15:54 fdobridge: <g​fxstrand> That seems to do something
15:55 fdobridge: <g​fxstrand> Okay, .phys look like it tosses the base address in favor of an offset in a register.
15:56 fdobridge: <g​fxstrand> So you have to add but that's not so bad.
16:10 fdobridge: <g​fxstrand> I might need a `store_per_vertex_output_nv` intrinsic...
16:11 fdobridge: <g​fxstrand> .PHYS also has to be scalar. 🙄
16:11 fdobridge: <g​fxstrand> Which isn't a huge deal. Just a bit of a pain to do in NAK.
16:21 fdobridge: <g​fxstrand> Still getting OOR_ADDR from the hardware. 😩
16:50 fdobridge: <k​arolherbst🐧🦀> yes
16:52 fdobridge: <k​arolherbst🐧🦀> in all 😛
16:53 fdobridge: <k​arolherbst🐧🦀> you can do indirect patch if the indirect is in a uniform register
16:53 fdobridge: <k​arolherbst🐧🦀> uhm.. non patch I mean
16:53 fdobridge: <k​arolherbst🐧🦀> if you need the third source, then it also only works with uniform indirects
16:54 fdobridge: <k​arolherbst🐧🦀> yeah.. it doesn't support an immediate
16:55 fdobridge: <k​arolherbst🐧🦀> but that doesn't matter as you always feed it a value from `AL2P` anyway
16:55 fdobridge: <k​arolherbst🐧🦀> ohh
16:55 fdobridge: <k​arolherbst🐧🦀> it's 32 bit only
16:55 fdobridge: <k​arolherbst🐧🦀> right
16:55 fdobridge: <k​arolherbst🐧🦀> all others are 32/64/96/128
16:56 fdobridge: <!​[NVK Whacker] Echo (she) 🇱🇹> So Y2K38 on NVIDIA? /s
17:14 fdobridge: <g​fxstrand> AL2P?
17:14 fdobridge: <g​fxstrand> I should look that up
17:14 fdobridge: <g​fxstrand> Okay, I can work with this...
17:24 fdobridge: <k​arolherbst🐧🦀> yeah.. `AL2P` converts from logical to physical addresses
17:25 fdobridge: <k​arolherbst🐧🦀> uses the bmap table
19:10 fdobridge: <g​fxstrand> @marysaka Can you throw a link to your Maxwell repo at @dwlsalmeida once you've got it rebased?
19:16 fdobridge: <m​arysaka> sure
20:44 gfxstrand: dakr: Did the kernel patch for the new getparam land?
20:49 dakr: Not yet, but I think I can push it in a minute.
20:49 dakr: gfxstrand: ^
20:50 gfxstrand: Cool
22:34 dakr: gfxstrand: pushed to drm-misc-fixes
22:51 gfxstrand: dakr: \o/
22:52 fdobridge: <g​fxstrand> ```
22:52 fdobridge: <g​fxstrand> NVK_USE_NAK=vs,fs,cs,tcs,tes
22:52 fdobridge: <g​fxstrand>
22:52 fdobridge: <g​fxstrand> Pass: 405639, Fail: 33, Crash: 8, Warn: 4, Skip: 3194910, Timeout: 2, Flake: 287, Duration: 1:41:26
22:52 fdobridge: <g​fxstrand> ```
23:32 fdobridge: <g​fxstrand> What does attribute I/O look like on kepler? Is it similar?