17:50 fdobridge: <n​anokatze> @jekstrand @karolherbst🐧 are you aware about debugging knobs on nv hardware? notably stuff like shader breakpoints and resume, is it known how those work? if yes, is it known whether breakpoints/resume work in graphics stages also, or just in compute?
17:51 fdobridge: <n​anokatze> of course in case for stopping in the middle of graphics stages we'd probably have to give up the gpu entirely to the debuggee, but would still be better than nothing
17:51 fdobridge: <n​anokatze> of course in case for stopping in the middle of graphics stages we'd probably have to give up the gpu entirely to the debuggee, but would still be better than nothing, can just use another pc in the meanwhile (edited)
17:51 fdobridge: <n​anokatze> of course in case for stopping in the middle of graphics stages we'd probably have to give up the gpu entirely to the debuggee, but would still be better than nothing, can just buy another gpu or use another pc in the meanwhile (edited)
17:51 fdobridge: <k​arolherbst🐧🦀> not entirely sure. We do know that there is a way to install shader trap handlers to also implement single stepping and that stuff, but I don't think anybody actually checked if you could do single stepping in the graphics pipeline
17:52 fdobridge: <n​anokatze> I see
17:52 fdobridge: <n​anokatze> wew support for single stepping
17:52 fdobridge: <n​anokatze> on amd I think single stepping is done by putting instructions into some side buffer with a breakpoint after that instruction
17:52 fdobridge: <n​anokatze> wew hw support for single stepping (edited)
17:52 fdobridge: <k​arolherbst🐧🦀> it's all implemented in the shader though
17:52 fdobridge: <k​arolherbst🐧🦀> yeah.. sounds about right
17:52 fdobridge: <n​anokatze> ah okay
17:53 fdobridge: <n​anokatze> I kinda want to have real debugging at some point hence why I was adding src location stuff to nir and brw
17:53 fdobridge: <k​arolherbst🐧🦀> so the shader ISA has some break instructions, but you can also trigger traps through MMIO access (or faults inside the shader), then the hardware may invoke the trap handler depending on the trap type
17:53 fdobridge: <n​anokatze> I kinda want to have real debugging at some point even for just compute at first, so that's why I was adding src location stuff to nir and brw (edited)
17:55 fdobridge: <k​arolherbst🐧🦀> I've tried some stuff here, but I couldn't figure out how to program the GPU correctly: https://gitlab.freedesktop.org/karolherbst/mesa/-/commit/a3fa10a9a2172ae4d12af974b50a48522c11e6b0
17:56 fdobridge: <n​anokatze> yeah breaks and trap handlers in general seem like they might work in graphics stages, they seem to also work on amd and intel in there, jekstrand had some branch for anv to dump registers from shaders on crash
17:56 fdobridge: <n​anokatze> yeah breaks and trap handlers in general seem like they might work in graphics stages, they seem to also work on amd and intel in there, jekstrand had some branch for anv+brw to dump registers from shaders on crash (edited)
17:56 fdobridge: <n​anokatze> but resumes is the interesting part
17:56 fdobridge: <n​anokatze> but resumes is the tricky part (edited)
17:57 fdobridge: <k​arolherbst🐧🦀> yeah...
21:20 fdobridge: <j​ekstrand> I think we're starting to get to the point where I really need a way to write cuda code and dump out shaders...
21:20 fdobridge: <j​ekstrand> Or Vulkan or something.
21:25 cheetahpixie: inb4 metal
22:34 fdobridge: <n​anokatze> yeah, metal on nv, sounds about right
22:38 RSpliet: heh,
22:38 RSpliet: karolherbst: up for implementing metal in rust? :')
22:41 fdobridge: <k​arolherbst🐧🦀> ehhh... no
22:42 fdobridge: <n​anokatze> we have metal at home: vulkan with descriptor buffers and other goodies
22:43 RSpliet: :D But the pun, it's so obvious, it must be a good idea!
22:43 fdobridge: <n​anokatze> I still don't get the pun, explain?
22:43 RSpliet: metal, rust...
22:45 fdobridge: <n​anokatze> I see