00:07RSpliet: skeggsb_: I didn't see you chime in on this patch https://cgit.freedesktop.org/mesa/mesa/commit/?id=d3642a0e027b67a2f5fa7628ed349d7fdb320b50 Is >251 GPRs supposed to be encoded as 0xff or as 0 on Volta?
00:08RSpliet: Or 0x100 but the field needs to grow? :-)
00:08karolherbst: RSpliet: it's 8 bit
00:08karolherbst: like on hardware
00:09RSpliet: karolherbst: I couldn't find this stuff in open-gpu-docs. But I guess you're saying 0x100 is not the encoding for >251 GPRs then
00:10karolherbst: huh weird...
00:10karolherbst: it's 9 bits
00:10karolherbst: why didn't I see that
00:10karolherbst: RSpliet: REGISTER_COUNT_V in the qmd.h files
00:11karolherbst: and SET_PIPELINE_REGISTER_COUNT in the 3d headers
00:11karolherbst: yeah.. it grew one bit with volta
00:11karolherbst: guess I overlooked stuff then :)
00:12karolherbst: maybe should make it a :9 then
00:13karolherbst: at least the code is better than it was before :D
00:16RSpliet: Wasn't sure about that, that's why I was asking whether the value 0 is a special value :-P But 9 bits makes sense
00:16RSpliet: Always happy to ask the annoying questions ^_^
00:17karolherbst:rather sees new MRs
09:08RSpliet: Sorry, best I can do is sparse vigilance :>
17:54karolherbst: pmoreau: you know a bit of weridly nv50 specific things, don't you? :D I have this weird shader where RA fails to resolve an union :( https://gist.githubusercontent.com/karolherbst/0dc1b3e43654554363fd9bd5690b9b10/raw/cecbacf93c49602bfd92c41b62e33d1dd9247413/gistfile1.txt
17:54karolherbst: but also feels like it's a pattern CL might have hit
17:54karolherbst: (tex consuming a 64 bit value)
22:12karolherbst: pmoreau: mind reviewing https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18382 ?
22:41karolherbst: and maybe https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18377 as well