08:44caroga: hi all!
13:22rhyskidd: karolherbst: how is the jetson going?
13:22rhyskidd: is it a t210?
13:22rhyskidd: i should get around to trying mainline on my shield tv again
13:29karolherbst: rhyskidd: quite bad
13:29karolherbst: DP doens't work
13:29karolherbst: IOMMU errors
13:29karolherbst: nouveau doesn't even load
13:47karolherbst: rhyskidd: but it might be better with your shield tv :p
14:44RSpliet: karolherbst: https://pdfs.semanticscholar.org/c067/3245ededf856e793b052e3b8cac69ef2c5d5.pdf
14:45RSpliet: I think that paper describes the loop merging that we talked about like last month in greater detail.
14:49RSpliet: They "cheat" by mandating a pragma directive to tell the compiler what to do. But maybe one of the papers that cite it (https://scholar.google.co.uk/scholar?cites=949131009574764137&as_sdt=2005&sciodt=0,5&hl=en ) might have some good automated criteria for performing this transformation ;-)
15:03karolherbst: RSpliet: we actually have funky code for that already
15:03karolherbst: but.. it's wrong :D
15:04karolherbst: RSpliet: https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nvc0/nvc0_program.c#n694
15:04karolherbst: it has to be hdr
15:04karolherbst: but yeah.
15:37RSpliet: karolherbst: Isn't that just predicting the max stack depth? That's orthogonal of the loop merge that NVIDIA did which was a really really cool optimisation.
15:38RSpliet: *orthogonal to
15:39karolherbst: oh, sure
15:39RSpliet: cwabbott: You're a compiler chap. Perhaps you can appreciate that optimisation strategy too ;-)
15:41karolherbst: but yeah
15:42karolherbst: it kind of looks like what nvidia is end up doing
15:42karolherbst: more or less
15:42karolherbst: cool find
15:44karolherbst: RSpliet: soo, if you have some spare time and want to deal with CFG stuff inside codegen :p you know what you have to do now
16:14RSpliet: Spare time :')
16:15RSpliet: Yeah, I'm actually thinking about CFGs for NVIDIA-like devices right now. It's scary