08:29diogenes_: Hello guys, does this little trick this work? http://dpaste.com/1MHSR2M
08:30diogenes_: Because i'm getting: http://dpaste.com/3HNSW0S
08:31diogenes_: it tries to open i965_drv_video.so whereas it should have tried to open nouveau_dri.so or maybe i'm wrong, no clue.
09:12adabilebo: https://github.com/VerticalResearchGroup/miaow/blob/master/src/verilog/rtl/vgpr/vgpr.v , I decided to give a matching clue for the replay, i am busy my own...maybe someone can read it without excessive comments
09:13adabilebo: 356-357 lines are important enough, and 380 line aka valid dest bits and wfid_mux
09:13adabilebo: assign issue_alu_dest_reg_addr = muxed_simx_dest_addr;
09:13adabilebo: assign issue_alu_dest_reg_valid = (|muxed_simx_dest_wr_en) & (~|lsu_dest_wr_en);
09:15adabilebo: those are delegated to scoreboard as blockers on SIMD, unary bitwise operations, it reads as when you do not write with LSU, as with out-of-bounds dest or swizzled out selectors
09:15adabilebo: the valid bits will be 0, and the instruction is not being scheduled
09:16adabilebo: as i previously said, the instruction that is not being scheduled, are tried to be replayed from i-buffer from deeper of the code, i call them fetch queues though
09:19adabilebo: the arbiter always works, so it is possible to schedule and skip in the alu instead of early in the issue scoreboard too, than you need write to out-of-bounds memory address, and alu arbiter seeks forward
09:19adabilebo: however to execute and schedule the alus , it is only possibly done with LSU recursion
09:20adabilebo: the wfid done bits have to be zero for the matching wfid in question
09:20adabilebo: and since this is a single instance and alu execute bits change those back to 1
09:21adabilebo: then only LSU can toggle those back to zero and hence schedule the alu instructions
09:27adabilebo: but it can schedule lsu operations on out-of-bounds accesses, cause it has contiguous one-way reentering fu class round robin arbiter
09:29adabilebo: but another details is that stalled lsu operations which put the lsu FSM into busy states, do not leave valid bits one, cause it has a NOTed mem_wait unary in the valid_entry.v
09:34adabilebo: another important detail is that , when you have one element doing out of bounds access, and alu arbiter runs in front seeking forward, but does not schedule for certain wfids, the scoreboard bits will be toggled off for those wfids, and the lsu that comes from behind has no scoreboarding present
09:43adabilebo: so the win of the debate has been given to me, the one who cleared up the confusion, as dutch internationals had spotted, it is quite easy to lay out such hw scheduling, the performance is mindblowing, the power usage is smaller, the heat production too, and it can be mixed with reclaiming the slots used to stay in spec
09:57adabilebo: and to flesh out some type of open source DRM based GPU , this is possible, there are ways to go on the line, two primary ones, are getting the fixed pipeline stuff from the papers, rasterizer can be got from kaist, or just use a synthesis tool that generates a parallel code from krhs ksim
09:58adabilebo: i rather think that skeggsb is quite talented and nice guy, and RSpliet is very nice guy and talented too, however the communication is totally off on the channel, and the driver progress has been suffering due to this
09:59adabilebo: some personalities are conflicting like me with some, and paranoia present etc.
10:04adabilebo: The card underlying circuit is laid to be very flexible for the driver developer and end user to be runned like wished.
10:06adabilebo: it is like one has to be a personality itself to understand how experts deal with things to have some confidence involved
10:08adabilebo: I for instance have been involved with hobby sports events still, and i know hence what are my limits and how tight the competition is and how many good players are there, the same thing is the quality of the work elsewhere, there are many smart people and the standards are hence high , they do things well obviously
10:12adabilebo: the first rule in sports, is that you can not change the way someone other performs, but you can level the standard and make yourself a better player, terrorising other competitors is not moral and never allowed, sportsmen appreciate others mostly well, but other outsiders are dangerous and the violate this rule mostly
10:24adabilebo: so i gave you material to work at, and some encouroging words and mindset for the future, So good luck from here, I myself have internal issues some of the remaining ones to solve in my personal life.
12:55imirkin: diogenes_: looks like it works ok without DRI_PRIME?
12:55imirkin: with DRI_PRIME it looks like it goes through some weird libva interaction -- sounds like that's picking up your intel chip
12:56imirkin: you can also force things with VDPAU_DRIVER=nouveau or whatever
12:56diogenes_: imirkin, yes exactly because intel is the primary GPU and no clue how to make it pick my nouveau.
12:56diogenes_: how can i force that?
12:56imirkin: didn't i just say how?
12:57diogenes_: imirkin, sorry i'm not that advanced :) so i should run that before staring the application?
12:57imirkin: VDPAU_DRIVER=nouveau DRI_PRIME=1 vdpauinfo
12:57imirkin: however really you're much better off using the intel gpu's decoding
12:57diogenes_: oh wow, thank you very much :) going to try it.
12:58diogenes_: no no because this particular game runs only with DRI_PRIME=1
12:58diogenes_: gives an error with intel
12:58imirkin: should report it to the intel folk
12:58imirkin: (and the game uses vdpau? crazy.)
12:59imirkin: there's like a 99% chance you'll get a hang with nouveau
12:59diogenes_: i don't really care about intel i'd rather work in improving nouveau
12:59imirkin: since the game probably wants to do vdpau + GL
12:59diogenes_: the game actually runs fine with nouveau, i'm getting almost the same performance as with probrietary nvidia blob
13:01diogenes_: wow looks like we got success with VDPAU_DRIVER=nouveau DRI_PRIME=1 vdpauinfo http://dpaste.com/0J9RVKV
13:01karolherbst: imirkin: ohh, since you are here, did you see my imms -> const buffer patch?
13:02karolherbst: diogenes_: yeah... but the issue is doing GL and vdpau within the same process, so this will most likely crash or hang your machine
13:02diogenes_: karolherbst, is there a golden balance solution?
13:03karolherbst: diogenes_: you could use the intel GPU for vdpau
13:03diogenes_: karolherbst, but isn't is vaapi only?
13:03karolherbst: but it only supports a few codecs
13:04diogenes_: ok what do i with libvdpau-va-gl? how to implement it?
13:04karolherbst: it should be a package
13:04diogenes_: oh i have it installed
13:05karolherbst: diogenes_: okay, so a simple vdpauinfo should print something
13:06diogenes_: karolherbst, here it is: http://dpaste.com/0NEP6V9
13:06diogenes_: but it still doesn't start the game, gives an error of Dx 5 something...
13:06karolherbst: vaapi fails to load
13:07karolherbst: what does vainfo prints?
13:07diogenes_: so a bug in the driver?
13:07karolherbst: mhh "__vaDriverInit_0_32"
13:07karolherbst: I have a __vaDriverInit_1_4
13:07diogenes_: here it is: http://dpaste.com/3JEXH5G
13:07karolherbst: maybe packages just out of sync
13:09diogenes_: as i said, i'm not nearly advanced in GL stuff but i want to learn it and you guys already helped me a lot to understand and to fix, so thank you very much!
13:09karolherbst: diogenes_: I get this: https://gist.github.com/karolherbst/d7709cc064b2b1858cf4f9e839936841
13:09karolherbst: diogenes_: I think whatever libvdpau-va-gl you've got is just heavily out of date
13:09diogenes_: oops sorry
13:10diogenes_: here is vainfo: http://dpaste.com/3JEXH5G
13:10karolherbst: diogenes_: it's fine with helping stuff, that threading issue is just super painful to fix and not a good issue to work on for somebody new to all that
13:12imirkin: karolherbst: i doubt i'll be able to - looks like things are going in an unpleasant direction for me anyways.
13:12imirkin: diogenes_: glad you got it working. good luck!
13:13diogenes_: Thank you imirkin!