00:29 orbea: imirkin: fyi, I built 4.15.6 with KASAN and my mplayer crashes are gone, hwdec seems to work as well. I dont think there were any nouveau changes since 4.14.4
00:29 orbea: *4.15.4
00:33 imirkin: hrmph
00:34 imirkin: someone did send a patch to ben's repo
00:34 imirkin: fixing what seemed to be a *pretty* bad bug in that alloc code
00:34 imirkin: https://github.com/skeggsb/nouveau/pull/1/files
00:34 imirkin: now, i dunno what the end-result of this bug is
00:35 imirkin: but it can't be good :)
00:35 imirkin: skeggsb: btw --^
00:35 imirkin: (i'm sure you saw it, but ... just pointing it out anyways)
00:35 skeggsb: yeah, i seen it. don't think it's related to the kasan issue though
00:37 imirkin: how's your new-and-improved error recovery going?
00:38 skeggsb: fairly well, i think. i'm in the last 10% of making it suitable to go upstream, seems to always take the longest :P
00:38 skeggsb: userspace still needs to not do stupid shit like mesa does with spinning forever on its own fences though...
01:25 imirkin: give me fences, or give me death!
01:37 mooch2: okay... so ptimer works
01:37 mooch2: but then why does win9x hang so badly?
01:41 mooch2: it just hangs on a black text mode screen with a cursor
01:41 mooch2: why?
04:05 gnarface: mooch2: was there more context to that?
04:05 mooch2: gnarface, the last thing it does is read from PFB BOOT 0
04:05 gnarface: mooch2: i've seen nouveau manage to get rudimentary functionality from nvidia cards with partially bad ram that wouldn't work in windows at all
04:05 mooch2: weird
04:06 mooch2: though this is nv3
04:06 gnarface: mooch2: as best as i could tell it just had to do with nouveau starting from a different end of the ram banks
04:06 mooch2: so no nouveau for me
04:06 gnarface: so like win9x would just freeze up and visually corrupt right away, or fail to boot at all
04:06 gnarface: but nouveau would work fine until you did something that required ALL the vram
04:08 mooch2: weird
04:08 mooch2: it seems to be doing a lot of lfb accesses
04:08 gnarface: anyway, dunno if that's got anything to do with your problem, but yea, windows full on locking up instantly while the linux version works fine, even when the problem is actually hardware failure - there's precedent for that
04:09 mooch2: well, the linux version hangs too here
04:10 mooch2: it just gets a bit further
04:11 mooch2: this is in my emulator, btw
04:11 gnarface: oh wait, win9x == emulator?
04:11 mooch2: no, this is win9x running on my emulator
04:11 mooch2: real drivers too
04:11 gnarface: i have trouble keeping up
04:11 mooch2: fake card :3
04:12 gnarface: was that you who was complaining about two other emulators and i thought they were pokeman?
04:12 mooch2: ???
04:12 gnarface: heh, must have been someone else. nevermind
04:12 mooch2: i don't remember that
04:12 mooch2: but anyway
04:12 gnarface: it was just yesterday
04:12 mooch2: i'm working on a riva 128 emulator
04:12 gnarface: 8MB or 4MB?
04:12 gnarface: or both?
04:13 mooch2: 4mb
04:13 gnarface: a noble goal to be sure
04:13 gnarface: weird hardware though
04:14 gnarface: i used to have one
04:14 mooch2: gnarface, i need help tho
04:14 mooch2: i have no idea why win9x is hanging
04:14 mooch2: i've tried EVERYTHING
04:14 gnarface: oh, hmmm. well i sympathize but i doubt it's something i can help with
04:15 mooch2: oh? why?
04:15 gnarface: i'm actually not a nouveau developer
04:15 gnarface: i couldn't patch a driver to save my life
04:15 mooch2: oh?
04:15 mooch2: same
04:15 gnarface: i'm fascinated with the work though
04:16 gnarface: there's all these nvidia cards out there, and they weren't even good enough at forced obsolescence to even burn them all out at EOL
04:16 gnarface: so some percentage still live on
04:16 gnarface: and probably will in fact live on longer than the company that made them
04:16 gnarface: we're gonna be talking about this like "remember nvidia?" in another 20 years
04:16 gnarface: by then i fantasize they'll have finally fixed reclocking in my 9800 GTX
04:17 gnarface: :-D
04:21 mooch2: FINALLY
04:21 mooch2: A LEAD
04:21 mooch2: IT'S ACCESSING PRAMIN
04:22 mooch2: AND PFIFO
09:40 mooch2: imirkin, karolherbst, any ideas why nouveau might say no such device on my emulated nv4?
09:41 karolherbst: mooch2: depends on where you get it
09:41 karolherbst: while loading or while doing ioctls?
09:41 mooch2: while loading
09:42 karolherbst: wrong vendor/device id? maybe wrong content in the 0x0 reg?
09:42 mooch2: specifically, shortly after executing startx
09:42 karolherbst: add printks
09:42 karolherbst: dmesg?
09:42 mooch2: i don't have the code to the version of nouveau i'm using
09:42 mooch2: ah, i'll try that
09:43 mooch2: pmc 0x0 is 0x0000400
09:43 karolherbst: mhh
09:43 mooch2: whoops i'm stupid
09:43 mooch2: vendor/device id is correct tho
09:43 mooch2: i know that
09:43 karolherbst: has 0x0 the same value on real hardware?
09:43 mooch2: apparently
09:44 mooch2: at least, it's a valid value for nv4
09:44 karolherbst: mhh
09:44 mooch2: though i did notice that i had the 4 in the wrong place
09:44 mooch2: so trying again now
09:44 karolherbst: you forget a 0?
09:44 karolherbst: PMC.ID => { STEPPING = 0 | DEVICE_ID = 0 | CHIPSET = 0 | FOUNDRY = TSMC | 0x400 } => PMC.ID => { STEPPING = 0 | DEVICE_ID = 0x4 | CHIPSET = 0 | FOUNDRY = TSMC }
09:44 karolherbst: ;)
09:45 karolherbst: having a wrong DEVICE_ID should upset nouveau quite a lot
09:45 mooch2: vendor id is 0x10de
09:45 mooch2: device id is 0x0020
09:46 karolherbst: I meant in the PMC.ID reg
09:46 mooch2: oh that
09:46 karolherbst: the DEVICE_ID is the chipset afaik
09:46 mooch2: well, you're thinking ID for NV10+
09:46 mooch2: this is nv4
09:46 mooch2: https://envytools.readthedocs.io/en/latest/hw/bus/pmc.html#reg-pmc-id-nv4
09:47 karolherbst: ohh wait
09:47 karolherbst: chipset is chipset
09:47 karolherbst: I see
09:49 karolherbst: mooch2: https://github.com/skeggsb/nouveau/blob/master/drm/nouveau/nvkm/engine/device/base.c#L2708
09:49 karolherbst: your hardware has to go through that at least
09:49 karolherbst: I doubt the old code is much different
09:49 karolherbst: actually starting from here: https://github.com/skeggsb/nouveau/blob/master/drm/nouveau/nvkm/engine/device/base.c#L2693
09:50 mooch2: apparently, the code only allows TSMC manufactured NV4s to go through
09:50 mooch2: that's a bug
09:50 karolherbst: "if ((boot0 & 0xff00fff0) == 0x20004000)" is key
09:51 karolherbst: yeah apparently
09:51 karolherbst: mooch2: no idea what the difference is, is your real hardware SGS?
09:51 mooch2: i don't have a real nv4 lol
09:52 mooch2: only a real nv3t
09:52 karolherbst: ahh
09:52 karolherbst: looking at the code, it seems like that nobody ever used Nouveau with a non TSMC one
09:52 karolherbst: or cared enough to file a bug
09:53 mooch2: well, there's your bug report
09:53 mooch2: it's a very simple fix lol
09:53 karolherbst: do you know it works?
09:53 mooch2: according to docs, the top 4 bits are for the foundry
09:53 mooch2: 0 is SGS, 1 is HELIOS, 2 is TSMC
09:53 karolherbst: right, but I mean, do you know it works out?
09:53 karolherbst: maybe the driver just insta crashes
09:54 mooch2: i'm looking at it
09:54 karolherbst: and now the few computers having that situation will fail to boot :O
09:54 karolherbst: ;)
09:54 mooch2: these test cycles are kinda long lol
09:54 mooch2: aight aight
09:54 mooch2: i guess more testing is needed
09:54 karolherbst: yeah well, I meant with real hardware being SGS
09:54 karolherbst: I doubt it matters much
09:54 karolherbst: but there might be subtle differences
09:54 karolherbst: and subtle fails
09:57 mooch2: alright, it seems to give the correct pmc id value now
09:57 mooch2: thanks
10:00 mooch2: still the same result, i'm afraid
10:02 mooch2: nothing in dmesg
10:32 karolherbst: mooch2: mhh, maybe something with the ddx then
11:25 karolherbst: mupuf: the DI/DT table table is all 0 for me
11:25 karolherbst: FAN test table has two values
11:26 karolherbst: 00 00 0a 10 27 0a: 10 2710: 10000
11:26 karolherbst: ahhh VOLTAGE RAIL
11:26 karolherbst: easy peasy
11:27 karolherbst: 0-31: uv
11:27 karolherbst: 32-40: some flags?
11:28 karolherbst: 41-48: ff
11:28 karolherbst: then 8bit flags again
11:28 karolherbst: I have two entries
11:29 karolherbst: 725000uv and 775000uv
11:29 karolherbst: 0x82 is MEM_VID_PWM
11:29 karolherbst: I have two PWMs to control the voltage, which is pretty obvious here
11:30 karolherbst: 0: 0x81 VID_PWM
11:30 karolherbst: 3: 0x82 MEM?_VID_PWM
11:31 karolherbst: sadly I have no field which is 0/3 in the entries
11:32 karolherbst: but I guess that's why we have the VOLTAGE DEVICE table
11:32 RSpliet: Bet I'm stating the obvious, but 0.775V sounds very low for DRAM
11:33 karolherbst: RSpliet: I assume it is the base voltage of the PWM
11:33 karolherbst: uhm, well the voltage produced if the pwm is set to 0%
11:34 RSpliet: FWIW, I think GDDR5 still requires something between 1,2-1,5V
11:35 karolherbst: 1300000uv in the other table
11:36 karolherbst: mhh
11:36 karolherbst: those tables are slightly weird
11:37 karolherbst: 300000
11:37 karolherbst: 1000000
11:37 karolherbst: 675000
11:39 karolherbst: 0x02 (0x00 | 0x01) 0x80 0x00 675000 0xff 300000 0x02 1300000 0x00 300000 0x01 1000000 0x00
11:39 karolherbst: this is the content of my VOLTAGE DEVICE table
11:40 karolherbst: that 0xff and the last 0x1 is also set in the empty entries
11:41 karolherbst: ahh
11:41 karolherbst: the second pwm is at 20348 and 2034c
11:44 karolherbst: RSpliet: do you have a kepler plugged in?
11:44 karolherbst: imirkin: can you check what is at 0x20348 and 0x2034c on your maxwell?
11:45 karolherbst: I hope those regs exists and are simply 0
12:01 mupuf: karolherbst: oh, so we can finally control the DRAM's voltage?
12:01 mupuf: well that is fun
12:01 mupuf: ship the patch, looks good to me
12:04 karolherbst: mupuf: makes since with Pascal, right?
12:05 mupuf: what do you mean? Are you asking me if this was introduced on Pascal?
12:05 karolherbst: mupuf: do you think it is okay to have the VID_PWM being an array? Strictly I don't think we have the second PWM on kepler, but... the location is just too convenient
12:05 karolherbst: but that spec_out might be wrong? dunno
12:05 mupuf: pretty sure Kepler already had the second PWM reg
12:05 karolherbst: it is kind of a wild guess, but it makes sense
12:05 karolherbst: ahh
12:06 karolherbst: well the second one has sane values on my GPU
12:06 mupuf: or maybe not, actually
12:06 mupuf: what GPU is that?
12:06 karolherbst: GP107
12:06 mupuf: ok
12:07 mupuf: I don't think reator has a kepler plugged, it will have to wait for tonight thern
12:07 karolherbst: I could ask somebody in the office to turn my machine on... I think I have a kepler2 and a maxwell in it
12:07 karolherbst: ...
12:08 karolherbst: ohh wait, LUKS
12:08 karolherbst: :( annoying
12:09 mupuf: yeah...
12:09 karolherbst: mupuf: anyway, that array shouldn't do any harm, or shall I wait?
12:09 mupuf: add a comment saying this may not apply to Kepler
12:09 karolherbst: k
12:10 mupuf: please check it when you are back to your desk
12:11 karolherbst: k
12:11 karolherbst: which will be like tomorrow the earliest
12:12 karolherbst: I stayed home cause I got sick thursday/friday and didn't want to risk going out while it is like -10C here
12:12 karolherbst: or get ill again :D
12:13 mupuf: karolherbst: makes sense, hope you get better soon!
12:13 karolherbst: well, yeah, I am quite fine already, worst day was friday actually
12:13 mupuf: it was chillier in Helsinki
12:14 mupuf: It went down to -21°C on saturday evening
12:14 karolherbst: :(
12:14 karolherbst: quite cold
12:15 mupuf: yeah, it is the temperature at which your nose freezes :D And it makes your eye lashes freeze in the time it takes to blink
12:15 mupuf: fun stuff
12:16 karolherbst: :D
13:52 RSpliet: mupuf: we already could control DRAM voltage
13:52 RSpliet: They just used to be binary GPIOs
13:52 mupuf: yes, I remembered that ;)
13:58 RSpliet: karolherbst: currently I have nvce/<email>/1 plugged in at home. I do have a kepler in my workstation right now, running an old version of the blob
13:59 karolherbst: RSpliet: ahh nice, I would jsut need to content of 20348 and 2034c
13:59 RSpliet: both 0
13:59 RSpliet: Can I safely nvamask them?
14:00 karolherbst: yeah
14:01 RSpliet: 020348: 00000000 01000fff 00000000 *
14:01 RSpliet: 2034c is "..."
14:01 karolherbst: weird
14:02 karolherbst: ohh wait
14:02 karolherbst: maybe not
14:02 RSpliet: NVE7
14:02 karolherbst: mupuf: do you remember that there is a bit at 28 on the PWM duty?
14:02 RSpliet: (GK107 I guess that should be)
14:02 karolherbst: uhm
14:02 mupuf: karolherbst: yes, I do
14:02 karolherbst: not the duty
14:02 mupuf: it was related to whether we should go to full speed or not when hitting the max temperature
14:02 mupuf: but only one PWM controller had it
14:02 mupuf: and I never got the exact logic
14:03 mupuf: so... I did not document it
14:03 karolherbst: mhh
14:03 karolherbst: the VID one has it as well
14:03 karolherbst: the DIV register here
14:17 imirkin: karolherbst: 20348 = 0, 2034c = error (reg not there)
14:17 imirkin: that's on GM107
14:17 karolherbst: mhh, weird
14:18 imirkin: oh wait, crap. that's on GK208
14:19 imirkin: same results on GM107 though :)
17:21 mupuf: imirkin: thanks for checking it out!
17:22 mupuf: karolherbst: yI guess you'll need to do some fixes then :) Nothing too dramatic
21:45 mooch: someone i know claims that someone here has access to the riva 128 reference manual
21:45 mooch: i'd like a copy, please
22:20 airlied: mooch: wow r128 docs, probably had a nda
22:21 mooch: eh
22:21 mooch: figures
22:21 mooch: i tried asking via email, showing them my emulation code for that card
22:21 mooch: and they just ignored it
22:21 mooch: for some stupid reason
22:33 airlied: mooch: agd5f is the amd contact out here
22:34 airlied: but I'm guessing finding r128 docs and getting lawyer clearance on them would be something they'd have no budget for
22:34 mwk: airlied: umm, riva 128 is an nvidia card...
22:35 airlied: oh sorry riva 128,confused it with r128
22:35 airlied: doh ignore me
22:56 imirkin_: karolherbst: pmoreau: as you guys are playing with CL, consider what to do about denorms
22:56 imirkin_: on fermi+, denorms are flushable on a per-instruction basis