00:01duttasankha: oh okay! Thanks. I am trying to learn about the mmio register functions listed in the docmentation. So I trying to find the codes that just pokes inside the mmio and display their functionalities. I think codes inside nva mostly handles that, right?
00:03duttasankha: or there are also other directories that contain that pokes into the mmio and demonstrates their functionalities.
00:03imirkin_: nvapeek/poke do the peeking/poking.
00:03imirkin_: something like hwtest will also do this
00:08duttasankha: okay . thanks for the suggestion.
00:10chillfan: OK, so I have forgotten the kernel command line for grub to set the performance level for reclocking.. can anyone point this out?
00:11imirkin_: chillfan: nouveau.config=NvClkMode=15
00:11imirkin_: note that it's decimal, not hex.
00:11skeggsb: hex works too...
00:11imirkin_: as 0x0f, maybe
00:11imirkin_: er, 0xf
00:12imirkin_: but not as 0f or f :)
00:12chillfan: hm maybe what I mean is NvBoost=2?
00:13imirkin_: that lets you use some of the higher clocks
00:13imirkin_: that are normally disabled
00:15chillfan: Ah thanks.. I'll just use the NvBoost command line.. clock mode 0xf would be equivalent to setting clock mode 0f?
00:15chillfan: Thanks, that will come in handy as well :)
10:53anEpiov: are we far from cheap multimonitor 4k cards?
10:55anEpiov: does linux suspend work with nouveau?
10:58RSpliet: anEpiov: suspend should work with nouveau, however some bugs remain affecting specific cards (not generations).
10:59RSpliet: I *think* (but don't take my word on it) that this suspend mechanism is used to power down NVIDIA GPUs in Optimus laptops when idle.
11:03imirkin_: anEpiov: i think intel IGP's should support multiple 4k monitors
11:03RSpliet: as for cheap multimonitor 4k cards, even if NVIDIA hardware supports this I suspect this will be far off for nouveau because this requires significant memory bandwidth (~2GiB/s per monitor). As long as we are unable to safely change DRAM clocks (missing firmware for fan ctrl and power management), we might not be able to provide that kind of bandwidth. Depends on the bus width and default clocks of individual cards though, but the chea
11:03imirkin_: nouveau does generally speaking support suspend. the thing RSpliet is talking about is runtime suspend for laptops, which is a bit different.
11:03imirkin_: but as with everything nouveau, bugs abound
11:06RSpliet: imirkin_: oh is it a different mechanism? I somehow assumed a "suspend to RAM" operation is nothing more than calling runtime suspend for each device, followed by a suspend of the CPU.
11:07imirkin_: RSpliet: it's related
11:11anEpiov: suspend on a desktop card
11:12anEpiov: RSpliet: I was wondering, because I just got a cheap ass $32 card for two 1080 monitors.
11:12anEpiov: in the past 1080 used to be top of the line.
11:16RSpliet: anEpiov: 1080p roughly has a quarter of the bandwidth requirement per monitor. If I do the calculations a GeForce 1030 should be able to provide the required bandwidth for two 4K monitors at a DRAM clock of ~250MHz, so perhaps nouveau can keep up. That leaves very little headroom for actual rendering though. The official driver should cope fine with the same card, because it can ramp up DRAM clocks to way beyond the boot clocks nouveau
11:17imirkin_: RSpliet: the thing is that (a) more is involved into actually turning the thing off -- with regular suspend the bios handles it, you power off the whole system (almost).
11:17anEpiov: RSpliet: but it doesn't cost $32
11:18imirkin_: RSpliet: while with runpm, you have to get the acpi to turn just that device off, and who knows how it comes back on
11:18anEpiov: imirkin_: suspend to ram does'nt work?
11:18imirkin_: RSpliet: and (b) ... i could have sworn i had a (b). oh well.
11:18imirkin_: anEpiov: it should.
11:18imirkin_: i've never personally tested it.
11:18anEpiov: I've killed two nvidia cards already with nouveau running at 24/7/365.
11:18imirkin_: [with nouveau]
11:18anEpiov: at some point the caps did POP! POP! POP!
11:19imirkin_: you sincerely think that was nouveau's fault?
11:19anEpiov: twice is too much coincidence, isn't it?
11:19imirkin_: if so, you should definitely stop using it. i'd hate to think we're breaking people's hw.
11:19anEpiov: busted caps
11:20anEpiov: imirkin_: that's why I am trynig to set up suspend to ram.
11:30imirkin_: i'm not enough of a EE to know what causes busted caps other than manufacturing defects
11:59Guepi: Hi everybody !
14:18optlink: skeggsb: Would you be able to provide me with the mmiotrace patch for differently sized remaps? I have some time again to try and run the traces for my reclocking issue.
14:53mwk: mupuf: so, as you probably figured by now, I have a halfway-usable Falcon decompiler
14:54mupuf: mwk: yes!
14:54mupuf: I just came back home!
14:54mupuf: tired as hell
14:54mupuf: and trying not to fall asleep, but this is going to be fantastic!
14:54mwk: I'll be working on improving it over the next month or so
14:56mwk: only v3 and v4 supported for now, and you're likely to get a NotImplementedError in your face if you try something harder than graph fw
14:56mwk: but... the code is much much cleaner and more modifiable than the last time
14:57mwk: in related news, I've finally completed and defended my MSc
14:59mwk: thanks :)
14:59mupuf: mwk: I wan't sure when I saw the photo, but it sure looked like it!
14:59mwk: the photo was taken before defense :)
15:00mupuf: well, congrats for everything!
15:00mupuf: do you have a list of stuff that trigger a NotImplementedError?
15:01mwk: the grand plan now is to hammer dynamite until it can handle all falcon fws
15:01mwk: maybe xtensa as well
15:02mwk: but I consider it just a tech demo before an ida-style gui decompiler
15:04mwk: mupuf: nostly weird shit, like fuunctions with more than one return val or return path
15:04mwk: syscalls (and I consider falcon trap to be one)
15:05mwk: also, it'll give up on indirect branches
15:06mwk: and 8/16-bit ops are not well-tested
15:06mwk: oh, and I need to add craploads of expr simplification rules
15:09mupuf: mwk: functions with more than one return val? You mean it would be pushed to different regs?
15:10mwk: as in, both r1 and r2 are useed to return values
15:13mwk: it's actually supported by the underlying analysis, it's kust a matter of printing it properly in the final phase
15:14mwk: I had a bit of time pressure when writing that :p
15:16mwk: the final commit went in 1h before the defense
15:31Guepi: got to go
15:31Guepi: see you later
16:49mupuf: mwk: ha ha!
17:43karolherbst: hurhur "01:00.1 Audio device: NVIDIA Corporation GK106 HDMI Audio Controller (rev a1)"
17:43karolherbst: Lekensteyn: ^^
17:44karolherbst: imirkin: if somebody shows up with HDMI audio problems on nouveau, cause no audio device: https://devtalk.nvidia.com/default/topic/1024022/linux/gtx-1060-no-audio-over-hdmi-only-hda-intel-detected-azalia/post/5211273/#5211273
17:44imirkin_: i saw that
17:45imirkin_: and i asked aaronp for what device range he was referring to
17:45imirkin_: but he never answered
17:45imirkin_: i seem to recall that airlied did something along those lines for runpm resume
17:45imirkin_: but i haven't had time to even look at the cdoe
17:51karolherbst: imirkin_: are you aware of any benefits power consumption wise if the audio device is known to the kernel?
17:53imirkin_: i know nothing about ... power consumption.
18:33duttasankha: I was wondering if someone could tell me where can I find the code that deals with PCOUNTER?
18:35imirkin_: check e.g. drm/nouveau/nvkm/engine/pm/gf100.c
18:36duttasankha: Is it present inside envytools?
18:36imirkin_: linux kernel
18:42duttasankha: @imirkin thanks but I wa wondering if you know the PCOUNTER code that is present inside envytools
18:44imirkin_: none, besides maybe docs.
18:44imirkin_: envytools doesn't really have much code
18:45duttasankha: okay. Yes. I was seeing the docs and so I thought it miight be present inside envy.
18:45duttasankha: Thanks so much
19:54karolherbst: 88488 02000000 PPCI+0x488
19:54karolherbst: imirkin_: convenient, isn't it?
19:57karolherbst: when setting that 488 register to 0x02000000 through setpci, PPCI.MISC0C enables the MULTI_FUN bit as well
19:59karolherbst: mwk: do you know anything about that multi_fun bit?
20:01karolherbst: at 0x8800c
20:01karolherbst: I think you added it to rnndb
20:01mwk: oh, that
20:01karolherbst: it is shomehow related to the 0x88488 0x02000000 bit
20:02mwk: that's just standard PCI header
20:02karolherbst: and it enables the discovery of the HDMI audio device on rescan
20:02mwk: by PCI standard, this bit is 1 if the device can have multiple functions
20:02karolherbst: so if I poke 0x02000000 into 0x88488 that MULTI_FUN bit gets enabled as well
20:02mwk: 0 means there can only be one function
20:02karolherbst: I thought the "FUN" stands for fun in the meaning of fun, not function
20:02mwk: so 488 bit 25 controls multi-function enable, apparently
20:03mwk: congratulations, you nailed down a bit
20:03karolherbst: nvidia helped here
20:04karolherbst: will add it to envytools then
20:07airlied: karolherbst: i had some hack to reenable audio on resume
20:07airlied: cant remeber what bits that hit
20:07karolherbst: airlied: https://devtalk.nvidia.com/default/topic/1024022/linux/gtx-1060-no-audio-over-hdmi-only-hda-intel-detected-azalia/post/5211273/#5211273
20:07airlied: cant grep right now
20:08karolherbst: setpci -s 01:00.0 0x488.l=0x2000000:0x2000000
20:08karolherbst: that responds to 0x88488 in the mmio space
20:08airlied: yeah i had some code i added years ago
20:08airlied: maybe it was 88488
20:08karolherbst: anyhow, in that post they also remove the device and rescan the bus
20:13karolherbst: nice, nvidia reads that reg
20:13airlied: karolherbst: ah yeah that was 88488 in runtime resume
20:13airlied: has a do magic comment
20:13airlied: i found that register write in a bios
20:14karolherbst: now I am curious why it doesn't work
20:14karolherbst: because it doesn't
20:14karolherbst: at least the audio device never showed up for me
20:14karolherbst: or I was blind and I didn't see it
20:16karolherbst: ohhh wow
20:17karolherbst: bbswitch doesn't like the GPU to be removed at all
20:18karolherbst: I will investigate if this indeed works without rescanning the bus and so on
20:24karolherbst: wondering what values 3 and 1 do
20:24karolherbst: allthough whenever I poke 1 into it, both bits are 0
20:24karolherbst: and 3 turns it into a 2
20:25karolherbst: a mystery
20:25mwk: that'd be good evidence that bit 24 doesn't, in fact, exist
20:25karolherbst: why would bit 24 flip bit 25?
20:25karolherbst: ohhhh wait
20:25karolherbst: I am silly
20:25karolherbst: yeah, you are right
20:27karolherbst: okay, now that runpm fun
20:28karolherbst: airlied: okay, I can confirm, that this poke in resume doesn't help on my board
20:29karolherbst: I am quite sure the remove/rescan dance is kind of required
20:29karolherbst: otherwise they wouldn't have put it there, would they?
20:29airlied: yeah we might need to do sometging on driver loaf
20:29airlied: which would be messy
20:29karolherbst: and I am quite sure we need to poke it on going into suspend if that would work at all
20:31duttasankha: I am going through envytools docs that contains the hardware details of MMIO registers. Is there any other hardware documentation sources (not asking about nvidia docs/forums) which contain other MMIO details? It is just that I don't want to miss. and I apologize to post in the middle of a discussion.
20:32karolherbst: airlied: yeah, even doing that pre suspend and rescan the bus doesn't help
20:32karolherbst: duttasankha: maybe some magic is hidden inside the driver, where the author was "too lazy" to put it into rnndb
20:33duttasankha: okay. Thanks a ton.