02:00 Ascavasaion_: How do I get the resolution from 640x 480 to 1024 x 768. in /etc/X11/xcorg.conf i have the line Driver "nouveau"
02:53 karolherbst: ohh skeggsb is back :)
02:54 karolherbst: skeggsb: don't forget the maxwell memory reclocking patch ;)
03:04 karolherbst: RSpliet: found time to check out the 2-stage pll thing?
03:04 RSpliet: karolherbst: not me, sorry
03:04 karolherbst: ahh no problem, I just thought you would try out limiting the clocks until it gets stable ;)
03:05 RSpliet: haven't had the time for it
03:05 karolherbst: but yeah, I would need access to a gpu with such an issue anyway
03:05 karolherbst: mupuf: do you have a kepler gpu with really high clocks?
03:06 RSpliet: karolherbst: have you inspected the trace to see how NVIDIA sets the PLLs?
03:06 karolherbst: not yet, was busy tinkering with my mac mini :D
03:09 RSpliet: fair enough
03:10 karolherbst: sadly the forcedeth driver doesn't support the WOL p mode, otherwise I could enable autosuspend there and have a nice box :)
03:11 RSpliet: have fun implementing it :-P
03:11 karolherbst: well
03:11 karolherbst: seems easy
03:11 karolherbst: you just set a flag on the device
03:11 karolherbst: WOL g is already there
03:11 karolherbst: but this would require stuff to be setup on the router to do that automagically
03:12 mupuf: karolherbst: nothing higher than the nve6
03:12 mupuf: want me to test stuff at work?
03:12 karolherbst: like if I want to connect through ssh, the router needs to now the device is off, sends a magic WOL package to wake it up and so on
03:12 karolherbst: mupuf: how nouveau goes with high clocks, 1200+MHz on the core
03:13 mupuf: well, I guess I can ask a friend for one
03:13 karolherbst: the gtx 650 has higher clocks
03:14 karolherbst: (higher than 650 Ti)
03:14 karolherbst: 640 also seems to have higher clocks
03:14 karolherbst: so it isn't especially about high end cards
03:15 karolherbst: RSpliet: here is the line to enable WOL on the nforce card: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/net/ethernet/nvidia/forcedeth.c#n4236
03:15 karolherbst: guess I have to RE something in the end
03:16 karolherbst: or ask if nvidia is filling to tell me :D
03:17 karolherbst: mupuf: ohh what do you think how much work would it be to use the nvapeek and nvapoke tools on other devices than gpus?
03:17 mupuf: karolherbst: what do you want it for?
03:17 karolherbst: nvidia ethernet card ...
03:18 mupuf: should not be too much work
03:19 karolherbst: yeah I just want to play with the wol reg until I find that stupid p mode
03:19 karolherbst: easier than to unload/load the driver and stuff
03:19 karolherbst: and less dangerous
03:19 karolherbst: especially because the wifi thing is unstable
03:26 mwk: karolherbst: it already works on some funny devices
03:26 karolherbst: mwk: what does work?
03:26 mwk: I imagine you could just duplicate the work I did for the APUs
03:27 mwk: the main thing you need to do is figuring out what BARs there are
03:27 karolherbst: ahhh
03:27 mwk: karolherbst: nva recognizes nvidia nforce/nforce2 APUs and nforce* SMUs
03:27 mwk: both are single-BAR devices
03:27 karolherbst: ahh okay
03:27 karolherbst: now I understand
03:28 karolherbst: so I would just add some ids and this could be it
03:28 RSpliet: karolherbst: unrelated btw, but my NVAC is running at 46°C... you might want to fix your airflow a little :-P
03:28 mwk: I suggest you just match vendor=nvidia and class=ethernet
03:28 karolherbst: mupuf: wanna try out my maxwell reclocking stuff since ben merged the fuc5 fixes? Just to have some tested-by/reviewed-by there ;)
03:28 karolherbst: RSpliet: gpu doesn't has a fan :D
03:28 RSpliet: my GPU doesn't have a fan either
03:28 mwk: all the nv ethernets are quite similiar
03:29 RSpliet: just the case
03:29 karolherbst: mhhh okay
03:29 karolherbst: also a 9400M?
03:29 mwk: yep
03:29 mwk: that'd be MCP79
03:29 karolherbst: it's a mac mini, there is no air flow for the gpu
03:29 RSpliet: karolherbst: 03:00.0 VGA compatible controller: NVIDIA Corporation ION VGA (rev b1)
03:29 karolherbst: the holes are at the botton
03:29 mupuf: karolherbst: testing the GM750 reclocking?
03:30 RSpliet: also, it's been on pretty much permanently for the past 5 years
03:30 karolherbst: and holes for the outgoing air is only there for the cpu fan
03:30 karolherbst: mupuf: yes
03:30 karlmag: but are the nv ethernets very different from other ethernets? (Or are they basically all the same? I.e a more generalized approach for them? I don't know, just putting in my $0.02)
03:31 mwk: karlmag: yep, very different
03:31 karolherbst: mupuf: this patch: https://github.com/karolherbst/nouveau/commit/11236f767a1f51d964fb18e9d7327f0b821e58d4
03:31 mwk: as far as register programming interface is concerned
03:32 karolherbst: mupuf: and ignore cpu crashes for now. As long as the memory runs stable and doesn't get weird, this should be enough for now
03:32 mwk: btw, the nv ethernet drivers for linux had a similiar story to nouveau
03:32 mwk: nvidia provided a propertiary driver, no documentation, community did a reverse engineering effort
03:32 karolherbst: ohhh okay
03:33 mupuf: karolherbst: by cpu, you mean core?
03:33 karolherbst: mupuf: right
03:33 mwk: over time, the RE driver (aptly named forcedeth) got stable and nvidia abandoned theirs
03:33 karolherbst: mhhh
03:33 karolherbst: well seems like nobody cared about wol that much
03:34 karolherbst: I can't imagine that the nforce chip only supports the g mode?
03:34 mwk: hmm, no idea
03:34 karolherbst: well my laptops realtek driver gives me pumbg
03:34 mwk: I did use wol years ago, but that was with g
03:34 karolherbst: yeah I want p
03:35 karolherbst: and mix it with PM_AUTOSLEEP :D
03:35 karolherbst: and maybe at a timeout as well
03:35 karolherbst: no wake up source for one minute => go to sleep
03:43 AlexAltea: mwk, thanks for your answer, the formula works perfect (and sorry for replying 7 hours late)
03:53 karolherbst: mwk: mhh nvalist gives me 2: (pci) 0000:00:0a.0Aborted :/
03:53 karolherbst: ahh
03:53 karolherbst: that*s nvalist fault
03:55 karolherbst: mwk: uhh nice, it works :)
03:55 karolherbst: but seems like that ethernet device works on a 16bit vlaue base
03:56 karolherbst: maybe not
03:58 karolherbst: mwk: is this okay or did I forget anything? https://github.com/karolherbst/envytools/commit/ac9d094c02a459f3b7f76486bdfcc4e412daea99
03:58 karolherbst: not sure about the match thing though
03:59 karolherbst: the mask
04:03 karolherbst: yay!
04:03 karolherbst: it worked
04:03 karolherbst: there is a p mode :)
04:03 karolherbst: I was able to wake up the mini by just pushing stuff through ssh :)
04:05 karolherbst: awesome
04:21 RSpliet: oh, meh. my cambridge address is not on the nouveau ML whitelist
04:54 mwk: karolherbst: I think the mask is too liberal, 0xffffff00 would be better
04:54 mwk: IIRC there was some strange kind of nv device that also begins with 0x2
04:55 karolherbst: okay
04:55 karolherbst: but otherwise it is fine?
04:55 mwk: yep
05:20 karolherbst: ohhh
05:20 karolherbst: that co-processor is a SMU
06:00 karolherbst: yay "Wake-on: pg"
06:01 karolherbst: but "Supports Wake-on: d" ....
06:01 karolherbst: ohhh
06:44 karolherbst: meh...
06:44 karolherbst: now my dhcp server running on my router pings my mini on Bootpc port :/
07:03 mupuf: karolherbst: you are going to like what I want to show you
07:03 mupuf: chromium has benchmarks
07:03 karolherbst: :)
07:04 karolherbst: I like what you say
07:04 mupuf: there is scrolling performance
07:04 mupuf: and other responsiveness metrics
07:04 mupuf: this is exactly what needs to be used for the interactivity case
07:04 mupuf: now if only browsers were not using the GPUs in a ridiculous way
07:05 mupuf: anyway
07:06 mupuf: https://sites.google.com/a/chromium.org/dev/developers/telemetry/run_locally
07:06 mupuf: https://www.chromium.org/developers/design-documents/rendering-benchmarks
07:07 mupuf: ./run_benchmark --browser=stable --use-live-sites --extra-browser-args="--disable-gpu-vsync" smoothness.scrolling_tough_ad_cases
07:07 mupuf: and you need to install google chrome
07:07 mupuf: chromium does not work
07:09 karolherbst: meh ...
07:10 mupuf: meh what?
07:12 karolherbst: that chromium doesn't work
07:12 mupuf: ah, right
07:13 mupuf: definitely not a big issue :D
07:14 karolherbst: :D wow, nouveau uses 4% of the entire memory on the mini
07:15 karolherbst: well used memory
07:24 mupuf: karolherbst: {0x10de, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0x20000, 0xffffff00}, --> that's a bit broad, isn't it?
07:25 karolherbst: and what are the others?
07:26 karolherbst: ANY is for device_id, subvendor_id and subdevice_id
07:26 karolherbst: then class, class_mask
07:30 karolherbst: mupuf: or is there something wrong I didn't catch?
07:36 RSpliet: who has permissions to add e-mail addresses to the mailinglist whitelist?
07:44 mupuf: RSpliet: marcheu
07:44 mupuf: karolherbst: well, aren't you pretending there is an eth device every time you find an nvidia gpu?
07:45 karolherbst: mupuf: how?
07:45 karolherbst: the device class is different
07:46 karolherbst: the rule I added matches only for ethernet devices
07:46 mupuf: 0x20000 --> this is the device class?
07:46 karolherbst: yeah
07:46 mupuf: ack!
07:46 mupuf: then sorry, ignore me :D
07:46 karolherbst: k
07:47 karolherbst: stupid router, something is sending somthing to the ethernet port and waking up my mini...
07:47 mwk: heh
07:48 mwk: I suppose you'd have to split it off to a separate subnet to avoid stupid shit like ARPs to unrelated hosts waking up the machine
07:48 karolherbst: well I already removed it from dhcp
07:48 night199uk: lo
07:48 karolherbst: I am not sure if it also wakesup on broadcasts though
07:48 night199uk: anyone know what the ‘u’ BIT table is on nvidia?
07:49 night199uk: i think it’s PMU related
07:49 mwk: hm, it should, how else would that work when someone needs to ARP it?
07:49 mwk: unless it's much smarter than I think... doubtful
07:49 karolherbst: mwk: well, WAKE_PHY means directly sent to the device though
07:50 mwk: hmm
07:50 karolherbst: there is also a unicast/multicast/broadcast and ARP mode for wol
07:50 karolherbst: :D
07:50 karolherbst: well maybe I REd arp without knwoing it?
07:51 RSpliet: night199uk: capital U or small u?
07:51 night199uk: small U
07:51 night199uk: ‘U’ is the display script entries right?
07:51 night199uk: iirc
07:51 night199uk: small u i’m interested in anyway :-)
07:52 night199uk: i believe its something to do with pmu programming from what i can see
07:52 night199uk: but i didn’t see a reference to it in nouveau… though i’m just updating my kernel source tree now
07:54 RSpliet: night199uk: don't think it's documented
07:54 night199uk: yer :-(
07:54 RSpliet: never took a closer look, what makes you think it's PMU related?
07:54 night199uk: i didn’t find it in envy either
07:54 karolherbst: mwk: mhh, now I set all bits on the reg except the phy one I REd and now it doesn't wake up on a direct connection attempt :/
07:54 night199uk: i’m seeing it in some new code that i’ve only seen in the gm204 GOP driver
07:55 RSpliet: ptr?
07:55 night199uk: it keys off a status flag set in some code that i strongly believe is PMU related because of the registers it sets
07:55 night199uk: can’t give a ptr, i’m reversing the gop drivers :-(
07:56 night199uk: sorry, know that doesn’t help much, not sure how it would be to share .ida files or similar :-)
07:58 night199uk: let me see if i can figure out some more context to give you
07:59 night199uk: wasn’t sure if it was a simple question or not :-)
08:03 RSpliet: not really, sorry. it'd be valuable to find out when this table was introduced
08:03 mwk: gop?
08:04 night199uk: the vbios
08:04 night199uk: well, the code in the PCI Option ROM to actually initialize the card
08:05 night199uk: i’ve been building (well, have built) and alternative PCI GOP ROM you can flash to your card
08:05 night199uk: so its basically like nouveau but + an extra amount of early stage init stuff
08:06 night199uk: i guess, and no 3d stuff
08:07 imirkin: not a *ton* of 3d in the vbios either :)
08:08 night199uk: nah, i meant nouveau
08:08 night199uk: no 3d at all in the vbios really
08:08 night199uk: some 2d accel stuff for blt etc
08:09 night199uk: hey imirkin, long time :-)
08:09 imirkin: howdy
08:11 night199uk: i have a fully working replacement efi rom for fermi & kepler now :-)
08:11 night199uk: just ploughing through maxwell
08:12 night199uk: but its more of an uncharted path because i guess you guys don’t have too much detail yet either?
08:12 mwk: eh
08:12 night199uk: maybe i have an old source tree sorry…
08:12 mwk: given what happend on 2nd-gen Maxwell... not much
08:13 night199uk: what happened on 2nd gen maxwell
08:13 night199uk: ?
08:13 mwk: the security stuff
08:13 night199uk: oh, the nvidia ‘blob’ stuff?
08:13 mwk: yeah
08:14 night199uk: do you know where the security checks are done?
08:14 mwk: sure, in hardware, in the PMU
08:14 night199uk: i was actually wondering idly the other day whether a replacement gop rom would help to get around that
08:14 mwk: nope
08:14 night199uk: ahh
08:14 night199uk: i don’t know much about that part yet
08:15 night199uk: i see what looks like code to upload an image from the vbios to the pmu
08:15 mwk: you actually can't run the init scripts on GM204
08:15 night199uk: i’m guessing thats a pmu code blob?
08:15 mwk: only the PMU has that power now
08:15 mwk: yep
08:15 night199uk: no way to reverse the PMU code blob thats in the vbios?
08:15 pmoreau: Ah ah ah! The PMU has the power! :-D
08:15 night199uk: hehe
08:16 mwk: night199uk: sure, you can read it
08:16 night199uk: sorry, on a tangent here it’s not my area :-)
08:16 mwk: but given that it's signed, there's no point in writing a replacement
08:16 night199uk: but can’t change it?
08:16 night199uk: right
08:16 night199uk: ergh
08:16 mwk: well
08:16 mwk: if it's anything like the earlier ones, there are secure and non-secure parts
08:16 mwk: so perhaps you could change some of it
08:17 night199uk: and the signing keys are stored in the pmu?
08:17 night199uk: or on fuses like the hdcp keys?
08:17 mwk: but I haven't actually looked at it, so...
08:17 mwk: in the PMU
08:17 karolherbst: I bet there is a security attack possible and write new code through some requests :)
08:17 night199uk: yeah
08:17 mwk: karolherbst: might be
08:17 night199uk: anyway its not really my focus right now :-)
08:18 night199uk: but can at least still replace the vbios
08:18 mwk: worst case, the signing algorithm is symetrical, you could just decap the GPU and get the key :p
08:19 night199uk: there must be a way for them to remotely update the key too
08:20 night199uk: you would think
08:20 mwk: nah, it's burned into silicon
08:20 RSpliet: please do that to a GM206 instead of a GM204... they're expensive enough as is
08:20 karolherbst: why not gm200?
08:20 karolherbst: :D
08:20 mwk: RSpliet: I think GM204 cost is a rounding error wrt cost of decapping :p
08:22 RSpliet: mwk: I'm quite sure the Cavendish lab around the corner already has a very high res microscope. would the rest of the equipment you'd need be expensive?
08:23 mwk: hmm
08:23 mwk: no idea really
08:30 night199uk: what is the PMU btw?
08:31 night199uk: port management unit?
08:31 mwk: power management unit
08:31 night199uk: hah, that was my 2nd guess
08:31 mwk: clocks, thermal, power gating, basically keeping the GPU running
08:31 night199uk: so all of that stuff moved into the PMU?
08:32 mwk: not all
08:32 night199uk: the vbios still has a lot of that code
08:32 mwk: but a good chunk of it
08:32 night199uk: have to check actually, maybe some of it is gone
08:33 night199uk: and what is nvidia’s position on the reversing stuff?
08:33 night199uk: i have this code for the replacement vbios
08:33 night199uk: but it’s basically a 1:1 reverse of the various gops right now
08:34 night199uk: i don’t quite know how i’m going to do anything with that yet, release bins perhaps
08:35 night199uk: the goal is to release native mac support for the later nvidia cards, since the last nvidia mac card was the gtx680… besides the built-in mobile chips.
08:36 night199uk: and the only vendor with native mac support was evga
09:17 AlexAltea: this is strange, on this gpu (nv47-ish) NV03_PFIFO_RAMHT points to 0x10000 in PRAMIN (0x0FF90000 in VRAM), and the handles in that tablet point to 0x4XXXX and 0x5XXXX in PRAMIN for DMA and engines respectively
09:18 AlexAltea: surprisingly, 0x4XXXX and 0x5XXXX are not VRAM (they should map to 0xFFC0000 and 0xFFD0000, but there's just junk there)
09:18 AlexAltea: anyone has seen such a thing before?
09:18 AlexAltea: table*
09:27 mwk: AlexAltea: could you show me the RAMHT entries?
09:27 AlexAltea: yes, let me upload the .bin
09:27 mwk: and, did you try looking via PRAMIN range?
09:27 mwk: hmm
09:27 mwk: NV47-ish means RSX, right?
09:28 mwk: what kind of access do you have to the GPU?
09:32 mwk: do me a favor, if you can... what value does register 0 have?
09:33 AlexAltea: mwk, here it is: https://github.com/AlexAltea/temporary/blob/master/ramht.html
09:33 AlexAltea: mwk correct
09:34 AlexAltea: by reading the offset in BAR2 (PRAMIN) I can see the objects at said offset (0x4XXXX and 0x5XXXX)
09:35 mwk: hmm
09:35 AlexAltea: reading the corresponding VRAM addresses on BAR1 (0xFFCXXXX and 0xFFDXXXX) returns junk
09:35 mwk: so what you're saying is, we have the RAMIN mapping wrong, at least for RSX
09:36 AlexAltea: (junk := the offset 0x1C0000 and 0x1D0000 in this .bin file)
09:36 AlexAltea: https://github.com/AlexAltea/temporary/blob/master/2_MB.bin
09:36 mwk: that's troubling
09:36 AlexAltea: yes, only the start of PRAMIN is in VRAM
09:36 AlexAltea: > what value does register 0 have?
09:37 AlexAltea: ok, I will take me a bit to check that
09:41 mwk: AlexAltea: uh, ISTM 0x1c0000 in this dump actually contains valid DMA objects
09:42 mwk: I wonder though, isn't PS3 a big-endian machine? the data in that dump is clearly little-endian
09:43 mwk: and 0x1d0000 contains valid graph objects
09:44 AlexAltea: mwk, yes it is, surprisingly hypervisor appears to reverse the endianness here
09:44 john_cephalopoda: Hey, I started a game and got this error message:
09:44 AlexAltea: please excuse my "noobness" then, heheh
09:44 john_cephalopoda: error: OpenGL extension GL_EXT_texture_compression_s3tc not supported.
09:44 john_cephalopoda: Pioneer can not run on your graphics card as it does not support compressed (DXTn/S3TC) format textures.
09:45 mwk: john_cephalopoda: please install libtxc_dxtn, or whatever it's called in your distribution
09:45 john_cephalopoda: Is it not supported at all or is there some compile flag somewhere, where I can enable it?
09:45 john_cephalopoda: Ah, thanks
09:45 mwk: there's a patent issue that prevents it from being supported by core mesa
09:45 AlexAltea: mwk, I just got confused because of this:
09:45 AlexAltea: http://www.eurasia.nu/wiki/index.php/PS3_HvReverseEngineering#Dump_of_RAMIN
09:46 AlexAltea: the dump that you see there doesn't match at all with what I see at those offsets 0x1CXXXX and 0x1DXXXX
09:46 mwk: it seems to match 0x1dXXXX
09:46 mwk: entry 0 is null object, 0x30
09:47 mwk: 1 is 3d object, 0x4097
09:47 AlexAltea: dear god I'm beyond retard
09:47 AlexAltea: I didn't take into account the endianness
09:47 AlexAltea: I was searching for 40 97 in my hex editor, not 97 40
09:47 AlexAltea: mwk, I'm really sorry
09:49 mwk: and don't mind the 0xffffffff at the end, GR objects are 5 words long on NV4x
09:49 mwk: so that's just uninitialized junk
09:49 AlexAltea: I see, thank you :)
13:36 nah|: hey
13:37 nah|: https://nouveau.freedesktop.org/wiki/ToDo/ this todo page list (though even for 2014 outdated) reverse engineering tasks, but in trello i couldnt find any. are there any? are there any (usefull) docs for getting into nvidia opengl driver reverse engineering?
13:41 karolherbst: nah|: ohh I know a lot of stuff one could do :D
13:42 karolherbst: nah|: best would be if you own a nvidia yourself and you miss some features
13:44 karolherbst: nah|: just think about what you want to implement (maybe power saving stuff? Maybe video encdoing, something else?) and then we can try to help you with that
13:44 karolherbst: usually everything has to be REd in the end with nouveau
13:47 nah|: i own an nvidia, and well i dont miss a feature, but that might be caused by the fact that i use win as my main plattform, and i just ended up somehow while browsing on that page and was like, mh yeah i have some certain interesst to know what happens inside a modern opengl implementation, so why not eventually combine that with trying to retrieve data someone could use
13:52 airlied: skeggsb: you hiding a -next tree somewhjere?
13:53 skeggsb: airlied: today probably
13:53 skeggsb: gnurou: ^^^ if there's anything more :)
14:33 karolherbst: skeggsb: hi, did you looked at the maxwell reclocking thing?
17:28 gnurou: skeggsb: I sent you two small fixes to squash into secure boot 2 days ago, and with that we should be clear
17:28 skeggsb: yeah, i plan on squashing those in today
17:28 gnurou: skeggsb: gm20b reclocking will probably wait for 4.7 as DT changes are required
17:29 gnurou: grr, if I were less negligent I would have submitted these before... :/
17:29 skeggsb: i want to re-try piglit on gm200 with your reset fixes, see if secure boot still screws up channel recovery
17:31 gnurou: they might help with that actually - the issue was that the unload ACR was run twice by mistake, something that may happen in channel recovery too
19:20 skeggsb: gnurou: \o/
19:20 skeggsb: survived a page fault from piglit now
19:20 skeggsb: one of your patches at least fixed recovery :P
19:21 skeggsb: might finally be able to do a proper comparison against gm10x to see if we missed anything else
19:22 imirkin: too many families for too few people =/
19:30 gnurou: skeggsb: cool - sorry about that, it was my mistake to begin with
21:09 imirkin: anyone with a kepler could check if dEQP-GLES3.functional.shaders.builtin_functions.precision.min.lowp_fragment.vec2 passes or not?
21:09 imirkin: pmoreau maybe?