02:35 anarsoul: oof, nir doesn't remove dead code for registers :(
02:35 anarsoul: annoying, but shouldn't be difficult to fix up in ppir
07:06 anarsoul: enunes: out of curiosity, do you have statistics on how many jobs your CI farm runs a day? :)
10:46 enunes: anarsoul: it is not a lot of jobs on average since it only triggers on things affecting lima or tree wide nir/galium/mesa etc, I checked now and in the last days it has been something like 20-30 individual jobs per day (gitlab pipelines trigger 3 jobs)
12:47 uis: anarsoul: Sorry, I meant stage, that generates instructions(including moves) after regalloc. It is (usually) after regalloc stage, when compiler knows whether there needs to be a move at all. And as result, instead of removing mov instructions, it just does not generate them.
17:32 anarsoul: uis: lima does regalloc after scheduling, and it's actually scheduling that generates extra movs (in addition to nir -> ppir translation)
18:33 anarsoul: it looks like we have some subtle bug in regalloc that is exposed when I added scheduling root nodes into the same instruction
18:33 anarsoul: root nodes do not have dependencies on each other, so it is safe to schedule them into the same instruction
18:33 anarsoul: yet regalloc somehow messes up :\
19:07 anarsoul: I think I know what is the issue
19:13 anarsoul: it looks like we don't add interference on destinations of the instruction
19:14 anarsoul: which was mostly fine until recently :)
19:27 anarsoul: and with that fixed we lost 5 shaders in shader-db with regalloc failure
19:51 anarsoul: yet 17 failures in deqp (and 2 unexpected improvements)
20:26 anarsoul: btw, it looks like piglit isn't very good at catching compiler bugs. It often passes when deqp fails
20:31 anarsoul: down to 1 failure, 2 unexpected improvements
20:42 anarsoul: the last failure is quite interesting. If we have multiple "end" blocks we need to mark out registers as live at the last instruction of each "end" block
21:22 anarsoul: enunes: spilling code behaviour is interesting :) see: https://gist.github.com/anarsoul/f66452ecdd2558ec5a431698ef424e32
21:23 anarsoul: it looks like it generates a load/store pair for each node that uses the reg, but doesn't check whether it's already loaded or stored
21:25 anarsoul: it will still work, but it's 5 more instructions
22:06 anarsoul: I'm kind of surprised that regalloc didn't explode on my MR to enable combiner unit usage :)
22:06 anarsoul: pure luck
22:52 anarsoul: CI passes, I'll clean it up tonight and send an MR
22:53 anarsoul: it's already 15% improvement in glmark2 :) a lot of simple glmark2 shaders are now compiled into a single instruction
22:53 anarsoul: I also have DCE ppir pass planned
22:54 anarsoul: and mov coalescing