06:36 ishitatsuyuki: Any resources describing how the owner-based syncs in amdgpu works (and how they compare to the Kernel/Read/Write/Bookkeep dma_resv sync mechanisms)?
20:48 illwieckz: I was super surprised (and super pleased!) to see a GCN1 with VGA cable running with amdgpu driver! When was it added? :)
20:49 illwieckz: *when support for analog was added?
21:23 agd5f: illwieckz, it exists today, just not in the DC code
21:23 agd5f: has existed since support was added
21:23 agd5f: but DC supports more advanced stuff like DP MST, etc.
21:25 illwieckz: I believed GCN1 on amdgpu did not support VGA
21:25 illwieckz: what would be missing to make amdgpu on GCN1&2 the default?
21:42 KitsuWhooa: Last time we had this discussion we didn't get anywhere IIRC
21:42 KitsuWhooa: (here, I mean)
21:42 KitsuWhooa: last I checked, radeon didn't even work with some of those cards
21:44 culuar: It appears solver code of SCIP is just too large for me to handle, I've been searching for the infer keywords after reading https://www.dcs.gla.ac.uk/~ciaran/talks/2022-dagstuhl-cp-for-sat.pdf and even glasgow solver too large, github page in the link, too much code, but the important sentence is Can infer thousands or millions of facts per clock cycle, it's on page 19, seems infer is loopless version of propagation.
21:45 culuar: the routines have to be worked on , but codes are so large, i can not make it that effortlessly
22:11 culuar: https://github.com/ciaranm/glasgow-constraint-solver/blob/main/gcs/innards/state.cc looking at the comments, that infer can be done before propagate and looking at code, i kind of presume that infer is doing some magic on the state similar to my dreams, such code can be debugged half years before made sense out of it. One thing is wished, something similar is needed to raise performance a modern solver based compiler. routines for compilation like
22:11 culuar: propagation and inference.