08:25 DavidHeidelberg[m]: airlied: Hey, just read your blogport. Did you got tinygrad running at reasonable speed? I'm planing to test with RX6800 16G
08:26 airlied: DavidHeidelberg[m]: I got one bench working on rocm cl and I think it was 2x as fast as my hacked up aco
08:26 airlied: I then realised I suck at working out why compute jobs are alow
08:27 DavidHeidelberg[m]: kk, I hoped I'll be able to skip ROCm and go directly rusticl, but I guess it isn't the time yet (but I'll test as first for sure)
08:28 airlied: yeah I had a few optimisations in a branch to make it work at all with aco
08:28 airlied: I was waiting to get a 7900xt since it has the gemm stuff
10:25 gawin: airlied: I'm bumping https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14921 up. Seems Emma's brought haswell ci back.
11:52 DavidHeidelberg[m]: airlied: btw. as we talking OpenCL, https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24229#note_2006696 maybe got lost in the inbox or too busy? :P
17:54 alyssa: Does Dozen pass dEQP-VK.spirv_assembly.instruction.graphics.opquantize.negative_nan_frag ?
17:55 alyssa: the lowering in dxil_nir.c seems to produce the wrong answer for -NaN input
17:55 alyssa: I guess nobody noticed because it got constant folded away first?
18:34 gfxstrand: robclark, cwabbott: Looking at YUV in turnip and the formats it's using are wrong the vk_format.h is wrong and... well, everything is wrong.
18:35 gfxstrand: I'm attempting to fix it but doing so requires a format with a WYXZ swizzle which doesn't seem to be a thing in the a3xx_color_swap enum.
18:35 gfxstrand: Suggestions on how to sort that out?
18:41 robclark: we do have to lower the yuv->rgb conversion so I guess the compiler could also swizzle things?
18:41 gfxstrand: Yes, maybe?
18:42 gfxstrand: I'm trying to make all the Vulkan stuff internally consistent.
18:42 gfxstrand: Right now, it's in a state of "smash until it works"
18:42 robclark: I think cwabbott knows the vk side better than I do
18:43 gfxstrand: So, I think you can just add a swizzle like you would for any other texture. You just have to swizzle a bit more, maybe.
18:44 gfxstrand: This is the patch: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24614/diffs?commit_id=8d7699937eb5e250d94face8af3a5ad9142bc101
18:44 gfxstrand: It's correct but it's going to break everyone.
18:44 gfxstrand: I think I know how to mitigate on Intel. Mitigating on qcom is probably going to take someone writing code.
18:45 robclark: is this only in the context of image/tex sampling? We do also have a regular swizzle there..
18:46 gfxstrand: Yeah, only sampling.
18:46 gfxstrand: So we can use a regular swizzle. It's just not plumbed for that.
19:09 gfxstrand: Looks like RADV is going to be annoying too. Also, the entirety of the AMD docs I seem to be able to find simply list that YUV formats exist, not what they mean.
19:09 gfxstrand: Also, they have numbers in the docs which don't match the numbers in the driver. Joy!
19:11 gfxstrand: Maybe RADV will magically do the right thing if we set things in u_format.csv the right way?
19:11 gfxstrand: What even is the right way?!?
19:11 gfxstrand: *sigh*
19:13 gfxstrand: Uh... I don't think RADV is even supporting these YUV formats right now.
19:24 jenatali: alyssa: what lowering?
21:28 gfxstrand: I'm going to regret asking this... How do I get lavapipe to dump LLVM?
21:28 zmike: GALLIVM_DEBUG=ir
21:28 alyssa: damn beat me to it
21:29 alyssa: jenatali: dxil_nir's fquantizef16 lowering
21:29 jenatali: It does pass the Vulkan CTS
21:29 jenatali: Could be constant folding I guess
21:30 alyssa: it is constant folding, yes
22:14 gfxstrand: Woo! Figured it out without having to actually read any LLVM. (-:
22:19 gfxstrand: I suspect RADV's 8-bit interleaved YCbCr support might not be real....
22:20 gfxstrand: But do I care enough to put my AMD card in my box and try things out?
22:22 zmike: it'd be the responsible thing to do
22:24 gfxstrand: Well, fine, I guess I'll be responsible. :-LO
22:25 gfxstrand: :-P
22:34 gfxstrand: RADV just doesn't support them.
22:34 gfxstrand: woo
22:34 gfxstrand: One less driver to fret over breaking.
22:35 gfxstrand: AMD HW appears to have enums for them but IDK what's missing for RADV.
22:37 gfxstrand: Haswell, however, does have support and no CI. WOo....
22:38 gfxstrand: *no currently working CI
22:38 gfxstrand: Just so no one dogpiles me
22:39 Sachiel: haswat
22:40 gfxstrand: Woo! Looks like I succeeded at not breaking Haswell. \o/
22:43 tnt:'s thankful on behalf of his old laptop :D
22:46 gfxstrand: How do I force lavapipe to use SoA?
22:46 zmike: soa is used for most stuff by default
22:50 gfxstrand: I have no idea why I can't repro this. :-/
23:21 alyssa: Why am I getting vk_graphics_pipeline_state::cb == NULL when I don't support dynamic blending?
23:22 alyssa: oh, because there are no colour RTs. fair enough