From 505af48c7b12467011ac1792d37b2837c01a1681 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 25 Jan 2012 18:13:00 -0500 Subject: [PATCH] r600g: properly initialize SX_SURFACE_SYNC on r7xx+ Required for proper SO synchronization. Signed-off-by: Alex Deucher --- src/gallium/drivers/r600/evergreen_hw_context.c | 2 ++ src/gallium/drivers/r600/evergreen_state.c | 7 +++++-- src/gallium/drivers/r600/evergreend.h | 1 + src/gallium/drivers/r600/r600_hw_context.c | 1 + src/gallium/drivers/r600/r600_state.c | 1 + src/gallium/drivers/r600/r600d.h | 1 + 6 files changed, 11 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c index 0463922..2412afd 100644 --- a/src/gallium/drivers/r600/evergreen_hw_context.c +++ b/src/gallium/drivers/r600/evergreen_hw_context.c @@ -125,6 +125,7 @@ static const struct r600_reg evergreen_context_reg_list[] = { {R_0282D0_PA_SC_VPORT_ZMIN_0, 0, 0, 0}, {R_0282D4_PA_SC_VPORT_ZMAX_0, 0, 0, 0}, {R_028350_SX_MISC, 0, 0, 0}, + {R_028354_SX_SURFACE_SYNC, 0, 0, 0}, {R_028380_SQ_VTX_SEMANTIC_0, 0, 0, 0}, {R_028384_SQ_VTX_SEMANTIC_1, 0, 0, 0}, {R_028388_SQ_VTX_SEMANTIC_2, 0, 0, 0}, @@ -495,6 +496,7 @@ static const struct r600_reg cayman_context_reg_list[] = { {R_0282D0_PA_SC_VPORT_ZMIN_0, 0, 0, 0}, {R_0282D4_PA_SC_VPORT_ZMAX_0, 0, 0, 0}, {R_028350_SX_MISC, 0, 0, 0}, + {R_028354_SX_SURFACE_SYNC, 0, 0, 0}, {R_028380_SQ_VTX_SEMANTIC_0, 0, 0, 0}, {R_028384_SQ_VTX_SEMANTIC_1, 0, 0, 0}, {R_028388_SQ_VTX_SEMANTIC_2, 0, 0, 0}, diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 6b91bab..8697510 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1735,6 +1735,9 @@ static void cayman_init_config(struct r600_pipe_context *rctx) r600_pipe_state_add_reg(rstate, R_008C14_SQ_GLOBAL_GPR_RESOURCE_MGMT_2, 0, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (1 << 8), 0xFFFFFFFF, NULL, 0); + r600_pipe_state_add_reg(rstate, R_028350_SX_MISC, 0x0, 0xFFFFFFFF, NULL, 0); + r600_pipe_state_add_reg(rstate, R_028354_SX_SURFACE_SYNC, 0x0000000F, 0xFFFFFFFF, NULL, 0); + r600_pipe_state_add_reg(rstate, R_028A4C_PA_SC_MODE_CNTL_1, 0x0, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0, 0xFFFFFFFF, NULL, 0); @@ -2152,9 +2155,9 @@ void evergreen_init_config(struct r600_pipe_context *rctx) r600_pipe_state_add_reg(rstate, R_009100_SPI_CONFIG_CNTL, 0x0, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_00913C_SPI_CONFIG_CNTL_1, S_00913C_VTX_DONE_DELAY(4), 0xFFFFFFFF, NULL, 0); -#if 0 r600_pipe_state_add_reg(rstate, R_028350_SX_MISC, 0x0, 0xFFFFFFFF, NULL, 0); - + r600_pipe_state_add_reg(rstate, R_028354_SX_SURFACE_SYNC, 0x0000000F, 0xFFFFFFFF, NULL, 0); +#if 0 r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x0, 0xFFFFFFFF, NULL, 0); #endif r600_pipe_state_add_reg(rstate, R_028A4C_PA_SC_MODE_CNTL_1, 0x0, 0xFFFFFFFF, NULL, 0); diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index d0c1130..882c91f 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -1567,6 +1567,7 @@ #define R_028238_CB_TARGET_MASK 0x00028238 #define R_02823C_CB_SHADER_MASK 0x0002823C #define R_028350_SX_MISC 0x00028350 +#define R_028354_SX_SURFACE_SYNC 0x00028354 #define R_028380_SQ_VTX_SEMANTIC_0 0x00028380 #define R_028384_SQ_VTX_SEMANTIC_1 0x00028384 #define R_028388_SQ_VTX_SEMANTIC_2 0x00028388 diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index d1a7e38..9e4a07c 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -289,6 +289,7 @@ static const struct r600_reg r600_ctl_const_list[] = { static const struct r600_reg r600_context_reg_list[] = { {R_028350_SX_MISC, 0, 0, 0}, + {R_028354_SX_SURFACE_SYNC, 0, 0, 0}, {R_0286C8_SPI_THREAD_GROUPING, 0, 0, 0}, {R_0288A8_SQ_ESGS_RING_ITEMSIZE, 0, 0, 0}, {R_0288AC_SQ_GSVS_RING_ITEMSIZE, 0, 0, 0}, diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 8f4e9f2..541bd0b 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -2030,6 +2030,7 @@ void r600_init_config(struct r600_pipe_context *rctx) r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x00000000, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 0x00420204, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 0x00000000, 0xFFFFFFFF, NULL, 0); + r600_pipe_state_add_reg(rstate, R_028354_SX_SURFACE_SYNC, 0x0000000F, 0xFFFFFFFF, NULL, 0); } else { r600_pipe_state_add_reg(rstate, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00000000, 0xFFFFFFFF, NULL, 0); r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX, diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index e2a526f..e9fbed6 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -2744,6 +2744,7 @@ #define S_028350_MULTIPASS(x) (((x) & 0x1) << 0) #define G_028350_MULTIPASS(x) (((x) >> 0) & 0x1) #define C_028350_MULTIPASS 0xFFFFFFFE +#define R_028354_SX_SURFACE_SYNC 0x028354 #define R_028380_SQ_VTX_SEMANTIC_0 0x028380 #define S_028380_SEMANTIC_ID(x) (((x) & 0xFF) << 0) #define G_028380_SEMANTIC_ID(x) (((x) >> 0) & 0xFF) -- 1.7.7.5