From e7f4e2bc1b6d364e5477a640d5171a5e1f8b79a9 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Sun, 30 Oct 2011 19:59:47 -0400 Subject: [PATCH 37/48] drm/radeon/kms: DCE6.1 disp eng pll updates DCE6.1 uses EXT_PLL1 for disp eng. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/atombios_crtc.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 6fe4a6d..224775b 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -767,7 +767,9 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev, * SetPixelClock provides the dividers */ args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); - if (ASIC_IS_DCE6(rdev)) + if (ASIC_IS_DCE61(rdev)) + args.v6.ucPpll = ATOM_EXT_PLL1; + else if (ASIC_IS_DCE6(rdev)) args.v6.ucPpll = ATOM_PPLL0; else args.v6.ucPpll = ATOM_DCPLL; -- 1.7.7.5