From b2040f635556f16560289c5d54b87e3dec22a2cd Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Wed, 3 Aug 2011 11:08:22 -0400
Subject: [PATCH 4/5] r600g: evergreen htile fixes, update comments

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 src/gallium/drivers/r600/evergreen_state.c |   13 ++++++++-----
 src/gallium/drivers/r600/r600_state.c      |    1 +
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 5d3c709..8a84aac 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1418,13 +1418,16 @@ static void evergreen_db(struct r600_pipe_context *rctx, struct r600_pipe_state
 	stencil_offset = ((surf->aligned_height * rtex->pitch_in_bytes[level]) + 255) & ~255;
 	db_z_info = S_028040_ARRAY_MODE(rtex->array_mode[level]) | S_028040_FORMAT(format);
 
+	/* XXX need to make sure drm is new enough to allow htile */
 	if (1) {
 		htile_offset = ((surf->aligned_height * rtex->pitch_in_blocks[level]) + stencil_offset + 255) & ~255;
-		r600_pipe_state_add_reg(rstate, R_028014_DB_HTILE_DATA_BASE,
-					(offset + htile_offset) >> 8, 0xFFFFFFFF, rbuffer->bo);
-		r600_pipe_state_add_reg(rstate, R_028ABC_DB_HTILE_SURFACE,
-					r600_htile_settings(rctx, state->zsbuf->texture), 0xFFFFFFFF, NULL);
-		db_z_info |= S_028040_TILE_SURFACE_ENABLE(1);
+		if (offset + htile_offset < r600_bo_size(rbuffer->bo)) {
+			r600_pipe_state_add_reg(rstate, R_028014_DB_HTILE_DATA_BASE,
+						(offset + htile_offset) >> 8, 0xFFFFFFFF, rbuffer->bo);
+			r600_pipe_state_add_reg(rstate, R_028ABC_DB_HTILE_SURFACE,
+						r600_htile_settings(rctx, state->zsbuf->texture), 0xFFFFFFFF, NULL);
+			db_z_info |= S_028040_TILE_SURFACE_ENABLE(1);
+		}
 	}
 
 	r600_pipe_state_add_reg(rstate, R_028048_DB_Z_READ_BASE,
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 86c67e5..fe035e2 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1555,6 +1555,7 @@ static void r600_db(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
 	format = r600_translate_dbformat(state->zsbuf->texture->format);
 	db_depth_info = S_028010_ARRAY_MODE(rtex->array_mode[level]) | S_028010_FORMAT(format);
 
+	/* XXX need to make sure drm is new enough to allow htile */
 	if (1) {
 		htile_offset = ((surf->aligned_height * rtex->pitch_in_bytes[level]) + 255) & ~255;
 		if (offset + htile_offset < r600_bo_size(rbuffer->bo)) {
-- 
1.7.1.1

