12:19 Mellow193: The most convenient way is to compress all interrupt handlers content with new handlers, then stuff should be sustainable, it's advanced engineers job, i had some free days now to think about the project, starts with dma loading operands, cpu executes alus, then pushing io, dma grabs and writes the io, then cpu issues the branching to the same remainder bank,dma writes the branch bank addresses, cpu executes operand read from main hash, dma
12:33 Mellow193: so only thing that works in decompressed domain is io writes, but this interrupts the logic with certain handler to get compressed format back to cpu hashes, it's the same address for all programs, but different hash.
12:35 Mellow193: i wonder if there is some interest towards such routines, i described only the runtime , compiling is a rough indexing job too, but that happens offline.
12:52 Mellow193: Compiling is a lot harder it needs to generate answer and operand sets continuously to the hashes, pack them and stuff them to determined banks, but overall, mission is possible, it's on hold here, cause i have not yet met free time.
12:54 Mellow193: https://medium.com/@lanceharvieruntime/comparing-ipc-methods-message-passing-sockets-pipes-interrupts-and-more-97b17021feab
14:02 Mellow193: but glx would generate an interrupt only on mapping , the read with pointers would just be a usual memory load, that no longer goes to kernel, the server only would do interrupt
14:04 Mellow193: so you had compressed the memory write and would not know the user of that memory unless you parse some kind of process maps
14:14 Mellow193: but whoever just wrote the memory to that address with interrupt has other party or pid getting the operands loaded from there.
14:17 Mellow193: so it's debatable whether operand loading should be run on compressed or uncompressed domain, otherwise one would have to carry shared memory to all participants from that interrupt, it's wasted storage if no pd was using that memoty
14:17 Mellow193: memory
14:27 Mellow193: how would one add a compressed mapping is where things go off the rail, some addressing specification of memory segmentation needs to be exposed
14:30 Mellow193: better to do within a compiler, where hardcoded memory address reads are just lifted into compressed loads
14:40 Mellow193: typically it's segmented that every pid has it's window as to how i understood, a base segment registers to it's address space
14:41 Mellow193: so if the address is written outside of this window that is really an IPC
21:26 Mellow193: So i think with IPC since the interrupt is being called only at mapping i.e allocation time, not on write or read at least when in tlb and pte i.e no page fault, as a matter of fact IPC from accessor pid at first access relies on page fault
21:26 Mellow193: https://tldp.org/LDP/tlk/ipc/ipc.html
21:27 Mellow193: would that mean that if paging is disabled the interrupt would not occur or put another way shared memory is disabled, bt that starts to make a bit sense, little more reading
21:42 Mellow193: https://github.com/occlum/occlum/issues/900 it appears that POSIX shared memory not System-V or mmap is needed when paging is disabled.
22:57 Mellow193: It seems that block by block access as with block device like /dev/shm is slower than mmap and system-V, which both require paging
22:57 Mellow193: https://blog.minhazav.dev/memory-sharing-in-linux/
22:58 Mellow193: but also it seems that POSIX suites fairly well
22:59 Mellow193: in the last case where interrupts are generated without context switch
23:00 Mellow193: the performance should be enough, but most importantly the correctness i.e the memory mapping is well preserved, that in accordance with the literature, have not done much testing yet
23:14 Mellow193: you can check the table from here, user managed interrupts for o_direct and async version of the last too
23:15 Mellow193: i consider that to be quite fine fallback without paging, though i doubt it performs less on write-combined memory
23:16 Mellow193: in other words stackoverflow threads for that context i have doubts on
23:16 Mellow193: https://www.scylladb.com/2017/10/05/io-access-methods-scylla/
23:20 Mellow193: https://dlib.hust.edu.vn/bitstream/HUST/18126/3/OER000000273.pdf ctrl-f for "without paging"
23:21 Mellow193: they claim what i claim, that o_direct and async of that is unlikely to be slower
23:21 Mellow193: in fact it should be faster
23:28 Mellow193: and to clarify the sentence of withot interrupts in the last pdf is not correct either, or maybe it is, but for fact posix uses signals which are interrupts or exceptions, but they get handled in userspace
23:28 Mellow193: regarding the security
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